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參數(shù)資料
| 型號： | 74ACTQ14SCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | CERAMIC CHIP/MIL-PRF-55681 |
| 中文描述： | ACT SERIES, HEX 1-INPUT INVERT GATE, PDSO14 |
| 封裝： | 0.150 INCH, MS-120, SOIC-14 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 82K |
| 代理商： | 74ACTQ14SCX |
3
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7
DC Electrical Characteristics
(Continued)
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 4:
DIP package.
Note 5:
Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.
Note 6:
Max number of data inputs (n) switching. (n
1) inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
ILD
),
0V to threshold (V
IHD
), f
=
1 MHz.
AC Electrical Characteristics
Note 7:
Voltage Range 5.0 is 5.0V
±
0.5V.
Note 8:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
Parameter
V
CC
(V)
5.0
5.0
T
A
=
+
25
°
C
Typ
1.9
1.2
T
A
=
40
°
C to
+
85
°
C
Guaranteed Limits
2.2
0.8
Units
Conditions
V
IHD
V
ILD
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
V
(Note 4)(Note 6)
(Note 4)(Note 6)
V
CC
T
A
=
+
25
°
C
C
L
=
50 pF
Typ
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Min
Symbol
Parameter
(V)
Units
(Note 7)
Min
Max
Max
t
PLH
Propagation Delay
5.0
3.0
8.0
10.0
3.0
11.0
ns
Data to Output
Propagation Delay
Data to Output
t
PHL
5.0
3.0
8.0
10.0
3.0
11.0
ns
t
OSHL
t
OSLH
Output to Output
Skew (Note 8)
5.0
0.5
1.0
1.0
ns
Symbol
Parameter
Typ
4.5
Units
pF
Conditions
C
IN
C
PD
Input Capacitance
V
CC
=
OPEN
V
CC
=
5.0V
Power Dissipation Capacitance
80
pF
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