參數(shù)資料
型號(hào): 74AHC74
廠商: NXP Semiconductors N.V.
英文描述: Dual D-type flip-flop with set and reset; positive-edge trigger(帶置位和復(fù)位的雙D觸發(fā)器;上升沿觸發(fā);)
中文描述: 雙D型觸發(fā)器設(shè)置和復(fù)位觸發(fā)器,積極邊緣觸發(fā)器(帶置位和復(fù)位的雙?觸發(fā)器,上升沿觸發(fā);)
文件頁(yè)數(shù): 11/20頁(yè)
文件大?。?/td> 92K
代理商: 74AHC74
1999 Sep 23
11
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74AHC74; 74AHCT74
AC WAVEFORMS
Fig.6
The clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nD to nCP set-up, the
nCP to nD hold times, the output transition times and the maximum clock pulse frequency.
The shaded areas indicate when the input is permitted to change for predictable output performance.
handbook, full pagewidth
MNA422
th
tsu
th
tPHL
tPHL
tW
tPLH
tPLH
tsu
1/fmax
VM
(1)
VM
(1)
VM
(1)
VM
(1)
VI
GND
VI
GND
nCP INPUT
nD INPUT
VOH
VOL
nQ OUTPUT
VOH
VOL
nQ OUTPUT
FAMILY
V
I
INPUT
REQUIREMENTS
V
M(1)
INPUT
V
M(1)
OUTPUT
AHC
AHCT
GND to V
CC
GND to 3.0 V
50% V
CC
1.5 V
50% V
CC
50% V
CC
相關(guān)PDF資料
PDF描述
74AHC74PWDH Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT74PWDH Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger(帶置位和復(fù)位的雙D觸發(fā)器;上升沿觸發(fā);)
74AHC86 Quad 2-input EXCLUSIVE-OR gate(四2輸入異或門)
74AHCT86 Quad 2-input EXCLUSIVE-OR gate(四2輸入異或門)
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