參數(shù)資料
型號： 74AHCT3G14
廠商： NXP Semiconductors N.V.
英文描述： Inverting Schmitt trigger
中文描述： 反相施密特觸發(fā)器
文件頁數(shù)： 2/21頁
文件大?。?/td> 137K
代理商： 74AHCT3G14
2004 Oct 18
2
Philips Semiconductors
Product specification
Inverting Schmitt trigger
74AHC3G14; 74AHCT3G14
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
– HBM EIA/JESD22-A114-B exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 500 V.
Low power dissipation
Balanced propagation delays
Multiple package options
Specified from
40
°
C to +85
°
C and
40
°
C to +125
°
C.
APPLICATIONS
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators.
DESCRIPTION
The74AHC3G/AHCT3G14isahigh-speedSi-gateCMOS
device.
The 74AHC3G/AHCT3G14 provides three inverting
buffers with Schmitt-trigger action. These devices are
capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
3.0 ns.
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = number of inputs switching;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
The condition is V
I
= GND to V
CC
.
2.
FUNCTION TABLE
See note 1.
Note
1.
H = HIGH voltage level;
L = LOW voltage level.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC3G14
AHCT3G14
t
PHL
/t
PLH
C
I
C
PD
propagation delay A to Y
input capacitance
power dissipation capacitance
C
L
= 15 pF; V
CC
= 5 V
3.2
1.5
10
4.1
1.5
12
ns
pF
pF
C
L
= 15 pF; f = 1 MHz;
notes 1 and 2
INPUT
OUTPUT
nA
nY
L
H
H
L
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