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參數(shù)資料
| 型號： | 74ALVCH16843 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 3-Line To 8-Line Decoders/Demultiplexers 16-SSOP -40 to 85 |
| 中文描述： | 18位總線接口D型鎖存器三態(tài) |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 74ALVCH16843 |
Philips Semiconductors
Product specification
74ALVCH16843
18-bit bus interface D-type latch (3-State)
1998 Aug 04
8
AC WAVEFORMS FOR V
CC
= 2.3V TO 2.7V AND
V
CC
< 2.3V RANGE
V
M
= 0.5 V
V
X
= V
OL
+ 0.15V
V
Y
= V
OH
–0.15V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
= V
CC
AC WAVEFORMS FOR V
CC
= 3.0V TO 3.6V AND
V
CC
= 2.7V RANGE
V
M
= 1.5 V
V
X
= V
OL
+ 0.3V
V
Y
= V
–0.3V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
= 2.7V
t
PHL
t
PLH
V
OL
CLR, D
n
V
I
PRE GND
V
OH
Q
n
OUTPUT
V
M
V
M
SH00147
Waveform 1. Data input (Dn) to output (Qn), clear input (CLR)
to output (Qn) and preset input (PRE) to output (Qn)
propagation delay
LE INPUT
Qn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
V
M
V
M
V
M
SH00150
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Qn) propagation delay
ééé
ééé
ééééééééé
ééééééééé
ééééééééé
Dn
INPUT
LE
INPUT
t
SU
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
t
SU
V
GND
V
I
GND
V
M
V
M
SH00149
Waveform 3. Data set-up and hold times for the Dn input to the
LE input
CLR, PRE
t
W(L)
t
REM
V
I
GND
LE
V
M
V
M
SH00148
V
I
GND
Waveform 4. Clear (CLR) and preset (PRE) pulse width, the
clear (CLR) and preset (PRE) to latch (LE) removal time
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SH00137
Waveform 5. 3-State enable and disable times
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVCH16843APA | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
| 74ALVCH16843DG | 功能描述:閉鎖 18BIT BUS INTER LTCH/SET RESET RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVCH16843DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit bus-interface D-type latch 3-State |
| 74ALVCH16843DGG,11 | 功能描述:閉鎖 18BIT BUS INTER RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVCH16843DGG,112 | 制造商:NXP Semiconductors 功能描述: |
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