參數(shù)資料
型號: 74AUP1G885GM,125
廠商: NXP Semiconductors
文件頁數(shù): 3/23頁
文件大?。?/td> 0K
描述: IC GATE DUAL FUNCTION 8-XQFN
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 4,000
系列: 74AUP
邏輯類型: 可配置多功能
電路數(shù): 1
輸入數(shù): 3
施密特觸發(fā)器輸入:
輸出類型: 單端
輸出電流高,低: 4mA,4mA
電源電壓: 0.8 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-XQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-XQFN-EP(1.6x1.6)
包裝: 帶卷 (TR)
74AUP1G885
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 9 — 31 January 2013
11 of 23
NXP Semiconductors
74AUP1G885
Low-power dual function gate
[1]
All typical values are measured at nominal VCC.
[2]
tpd is the same as tPLH and tPHL.
[3]
All specified values are the average typical values over all stated loads.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L VCC
2
f
o) = sum of the outputs.
12. Waveforms
CL = 5 pF, 10 pF, 15 pF and 30 pF
CPD
power dissipation
capacitance
fi = 1 MHz; VI = GND to VCC
VCC = 0.8 V
-
2.7
-
pF
VCC = 1.1 V to 1.3 V
-
2.9
-
pF
VCC = 1.4 V to 1.6 V
-
3.0
-
pF
VCC = 1.65 V to 1.95 V
-
3.1
-
pF
VCC = 2.3 V to 2.7 V
-
3.5
-
pF
VCC = 3.0 V to 3.6 V
-
4.1
-
pF
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 7.
Symbol Parameter
Conditions
25
C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
(85
C)
Max
(125
C)
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
The data input (A, B, C) to output (nY) propagation delays
001aae356
VM
VOL
VOH
tPLH
tPHL
nY output
VI
GND
A, B, C input
Table 9.
Measurement points
Supply voltage
Output
Input
VCC
VM
VI
tr = tf
0.8 V to 3.6 V
0.5
V
CC
0.5
V
CC
VCC
3.0 ns
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