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參數(shù)資料
| 型號(hào)： | 74CB3T3384DBQRG4 |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 12/19頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH BUS 10BIT FET 24-QSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | 74CB |
| 類(lèi)型： | FET 總線開(kāi)關(guān) |
| 電路： | 5 x 1:1 |
| 獨(dú)立電路： | 2 |
| 輸出電流高，低： | 32mA，64mA |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP/QSOP |
| 包裝： | 帶卷 (TR) |
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SN74CB3T3384
10BIT FET BUS SWITCH
2.5V/3.3V LOW VOLTAGE BUS SWITCH WITH 5V TOLERANT LEVEL SHIFTER
SCDS159B OCTOBER 2003 REVISED MARCH 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The SN74CB3T3384 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron),
allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O
ports by providing voltage translation that tracks VCC. The SN74CB3T3384 supports systems using 5-V TTL,
3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).
VCC
≈VCC
5.5 V
0 V
NOTE A: If the input high voltage (VIH) level is greater than or equal to VCC 1 V, and less than or equal to 5.5 V, the output high
voltage (VOH) level will be equal to approximately the VCC voltage level.
Input Voltages
Output Voltages
0 V
≈VCC 1 V
VCC
IN
OUT
CB3T
Figure 1. Typical DC-Voltage-Translation Characteristics
The SN74CB3T3384 is organized as two 5-bit bus switches with separate ouput-enable (1OE, 2OE) inputs. It
can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE is low, the associated 5-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When
OE is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 5-bit bus switch)
INPUT
INPUT/OUTPUT
FUNCTION
INPUT
OE
INPUT/OUTPUT
A
FUNCTION
L
B
A port = B port
H
Z
Disconnect
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