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參數(shù)資料
| 型號(hào)： | 74F181 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Arithmetic logic unit |
| 中文描述： | 算術(shù)邏輯單元 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 82K |
| 代理商： | 74F181 |
Philips Semiconductors FAST Products
Product specification
74F181
Arithmetic logic unit
March 3, 1989
6
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
NOM
MAX
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
–18
mA
V
OH
High level output voltage
A=B only
4.5
V
I
OH
High-level output current
Any output except A=B
–1
mA
I
OL
Low-level output current
20
mA
T
amb
Operating free-air temperature range
0
+70
°
C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
MIN
TYP
2
MAX
I
OH
High-level output
current
A=B only
V
CC
= MIN, V
IL
= MAX; V
IH
= MIN, V
OH
= MAX
250
μ
A
V
OH
High-level output
voltage
Any output
except A=B
V
CC
= MIN,
V
IH
= MIN
I
OH
= MAX
±
10%V
CC
2.5
V
V
IL
= MAX,
±
5%V
CC
2.7
3.4
V
OL
Low-level output voltage
V
CC
= MIN,
V
IH
= MIN
I
OL
= MAX
±
10%V
CC
0.30
0.50
V
V
IL
= MAX,
±
5%V
CC
0.30
0.50
V
IK
I
I
I
IH
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
–0.73
–1.2
V
Input current at maximum input voltage
100
μ
A
μ
A
High-level input current
20
I
IL
Low-level input current
M
V
CC
= MAX, V
I
= 0.5V
–0.6
mA
A0–A3, B0–B3
–1.8
mA
S0–S3
–2.4
mA
Cn
–3.0
mA
I
OS
Short-circuit output
current
3
Any output
except A=B
V
CC
= MAX
–60
–150
mA
I
CC
Supply current (total)
I
CCH
V
CC
= MAX
S0–S3=M=A0–A3=4.5V,
B0–B3=Cn=GND
43
65
mA
I
CCL
S0–S3=M=4.5V,
B0–B3=Cn=A0–A3=GND
43
65
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
= 5V, T
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
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