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參數(shù)資料
| 型號： | 74F194PC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bidirectional Universal Shift Register |
| 中文描述： | F/FAST SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 162K |
| 代理商： | 74F194PC |
Unit Loading/Fan Out
Pin
54F/74F
Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
HIGH/LOW
S
0
, S
1
P
0
–P
3
D
SR
D
SL
CP
MR
Q
0
–Q
3
Mode Control Inputs
Parallel Data Inputs
Serial Data Input (Shift Right)
Serial Data Input (Shift Left)
Clock Pulse Input (Active Rising Edge)
Asynchronous Master Reset Input (Active LOW)
Parallel Outputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
b
1 mA/20 mA
Functional Description
The ’F194 contains four edge-triggered D flip-flops and the
necessary interstage logic to synchronously perform shift
right, shift left, parallel load and hold operations. Signals
applied to the Select (S
0
, S
1
) inputs determine the type of
operation, as shown in the Mode Select Table. Signals on
the Select, Parallel data (P
0
–P
3
) and Serial data (D
SR
, D
SL
)
inputs can change when the clock is in either state, provid-
ed only that the recommended setup and hold times, with
respect to the clock rising edge, are observed. A LOW sig-
nal on Master Reset (MR) overrides all other inputs and
forces the outputs LOW.
Mode Select Table
Operating
Mode
Inputs
Outputs
MR
S
1
S
0
D
SR
D
SL
P
n
Q
0
Q
1
Q
2
Q
3
Reset
L
X
X
X
X
X
L
L
L
L
Hold
H
l
l
X
X
X
q
0
q
1
q
2
q
3
Shift Left
H
H
h
h
l
l
X
X
l
X
X
q
1
q
1
q
2
q
2
q
3
q
3
L
H
h
Shift Right
H
H
l
l
h
h
l
X
X
X
X
L
H
q
0
q
0
q
1
q
1
q
2
q
2
h
Parallel Load
H
h
h
X
X
p
n
p
0
p
1
p
2
p
3
H (h)
e
High Voltage Level
L (l)
e
Low Voltage Level
p
n
(q
n
)
e
Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition.
X
e
Immaterial
Logic Diagram
TL/F/9498–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
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| 74F194SC | 4-Bit Bidirectional Universal Shift Register |
| 74F194SJ | 4-Bit Bidirectional Universal Shift Register |
| 74F194PC | 4-Bit Bidirectional Universal Shift Register |
| 74F194 | 4-Bit Bidirectional Universal Shift Register |
| 74F194SC | 4-Bit Bidirectional Universal Shift Register |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F194SC | 功能描述:計數(shù)器移位寄存器 4-Bit Bidir Shft Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74F194SCX | 功能描述:計數(shù)器移位寄存器 USE 512-74F194SC RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74F194SJ | 功能描述:計數(shù)器移位寄存器 4-Bit Bidir Shft Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74F194SJX | 功能描述:計數(shù)器移位寄存器 4-Bit Bidir Shft Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74F195A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:4-bit parallel-access shift register |
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