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參數(shù)資料
| 型號： | 74F253 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual 4-Input Multiplexer with TRI-STATE Outputs(帶三態(tài)輸出的雙4輸入多路復用器) |
| 中文描述： | 雙路4輸入多路復用器與三態(tài)輸出（帶三態(tài)輸出的雙4輸入多路復用器） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 168K |
| 代理商： | 74F253 |
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
b
3 mA/24 mA (20 mA)
HIGH/LOW
I
0a
–I
3a
I
0b
–I
3b
S
0
–S
1
OE
a
OE
b
Z
a
, Z
b
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Output Enable Input (Active LOW)
Side B Output Enable Input (Active LOW)
TRI-STATE Outputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40(33.3)
Functional Description
This device contains two identical 4-input multiplexers with
TRI-STATE outputs. They select two bits from four sources
selected by common Select inputs (S
0
, S
1
). The 4-input mul-
tiplexers have individual Output Enable (OE
a
, OE
b
) inputs
which, when HIGH, force the outputs to a high impedance
(High Z) state. This device is the logic implementation of a
2-pole, 4-position switch, where the position of the switch is
determined by the logic levels supplied to the two select
inputs. The logic equations for the outputs are shown below:
Z
a
e
OE
a
#
(I
0a
#
S
1
#
S
0
a
I
1a
#
S
1
#
S
0
a
I
2a
#
S
1
#
S
0
a
I
3a
#
S
1
#
S
0
)
Z
b
e
OE
b
#
(I
0b
#
S
1
#
S
0
a
I
1b
#
S
1
#
S
0
a
I
2b
#
S
1
#
S
0
a
I
3b
#
S
1
#
S
0
)
If the outputs of TRI-STATE devices are tied together, all
but one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings. De-
signers should ensure that Output Enable signals to TRI-
STATE devices whose outputs are tied together are de-
signed so that there is no overlap.
Truth Table
Select
Inputs
Data Inputs
Output
Enable
Output
S
0
S
1
I
0
I
1
I
2
I
3
OE
Z
X
L
L
H
X
L
L
L
X
L
H
X
X
X
X
L
X
X
X
X
X
X
X
X
H
L
L
L
Z
L
H
L
H
L
L
H
H
L
H
H
H
H
X
X
X
X
X
H
X
X
X
X
X
L
H
X
X
X
X
X
L
H
L
L
L
L
L
H
L
H
L
H
Address inputs S
0
and S
1
are common to both sections.
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
Logic Diagram
TL/F/9505–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
相關PDF資料 |
PDF描述 |
|---|---|
| 74F253PC | Dual 4-Input Multiplexer with TRI-STATE Outputs |
| 74F253SJ | Dual 4-Input Multiplexer with TRI-STATE Outputs |
| 74F253SC | Dual 4-Input Multiplexer with 3-STATE Outputs |
| 74F253 | Dual 4-Input Multiplexer with 3-STATE Outputs |
| 74F253PC | Dual 4-Input Multiplexer with 3-STATE Outputs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74F253_00 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual 4-Input Multiplexer with 3-STATE Outputs |
| 74F253_UKG3026T WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F253_UKH3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F253-02PC | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F253DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Input Digital Multiplexer |
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