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參數(shù)資料
| 型號： | 74F30244 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal 30Ω line driver with enable,non-inverting (open collector)(帶使能30Ω的八線驅(qū)動器，同向（開啟集電極）) |
| 中文描述： | 以使八路30Ω，非反相（集電極）（帶使能30Ω的八線驅(qū)動器，同向（開啟集電極），線路驅(qū)動器） |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 128K |
| 代理商： | 74F30244 |
Philips Semiconductors
Application note
AN214
74F extended octal-plus family applications
June 1988
4
Transceivers have an input loading current of
±
70
μ
A, which is the
combination of the “Light-Load” NPN input structure’s
±
20
μ
A and the
3-State Hi-Z output’s
±
50
μ
A leakage current.
The low “Light-Load” input current and high speed performance
makes this family ideal for interfacing to low drive capability, slower
MOS CPU, peripherals and semi-custom chips used in most of
today’s state-of-the-art logic designs. Besides very low input current
requirements, this “Light-Load” input has another significant
advantage over “traditional” input structures: Very low input
capacitance (smaller stored charge) due to very small device
geometries. Therefore, when Extended Octal-Plus devices are
connected to a bus, they present less AC bus loading and do not
significantly lower the characteristic impedance of the bus to the
extent “traditional” input structures do. Thus, the amount of the AC
current a bus driver has to produce to change the state of the bus is
lowered and in many cases can make a difference between incident
wave switching of the bus versus losing time waiting for a reflected
wave.
The Philips Semiconductors 74F “Light-Load” input structure is
discussed in more detail in Application Note AN215
Output Drive Capabilities
Virtually all devices in the EXtended Octal-Plus Family are
guaranteed to source/sink more than –15mA/64mA @ V
OH
V
OL
=
2.0/0.55V. One exception is the 74F841-thru-846 Series of Bus
Interface Latches which are specified at –15/48mA. Several of the
family’s transceiver products have lower A
N
output drive capabilities
to reduce package power dissipation. Refer to Tables 1 and 3.
For example, the 74F657 Parity Bus Transceiver has two output
ports with different capacities: The A
N
port is guaranteed to
source/sink –3mA/24mA (I
OH
/I
OL
= 2.4/0.50V), and the B
N
port has
an output drive capability of –15mA/64mA at 2.0V/0.55V. The
74F657’s A
N
port is designed to interface the chip side of the PC
board to the backplane bus, while the B
N
port is capable of driving a
transmission line or bus backplane line.
Referring to Figure 3, all of the Family’s 3-State, totem-pole output
structures have a schottky blocking diode, D13, in their pull-up
output structures. These diodes block leakage current from flowing
into the outputs when V
CC
is either open or shorted to ground.
This gives a very important advantage of being able to power down
a PCB (or several PCBs) without disabling the bus and even without
producing any glitching on the bus due to an undesired change in
the output state of the device being powered down.
The output short-circuit (I
OS
) limiting resistor (R14), the
anode-to-cathode resistance/voltage drop of D13 and the
collector-to-emitter/base-to-emitter resistance/voltage drop of Q13
limit the amount of current that can be sourced from a HIGH level
output at a specified V
OH
. For most of the parts in the family, R14 is
equal to 12
. the A
N
port of several of the transceivers utilize an
R14 of 30
producing I
OH
(@ V
OH
= 20V) of –6mA versus –15mA
from the B
N
ports 12
R14.
The output HIGH level sourcing current, I
OH
, at a specified output
voltage, V
OH
, can be calculated by subtracting the voltage drops of
D13, the pull-up darlington transistor, Q12/13, and the desired V
OH
level from V
CC
and dividing by the value of R14 plus the
anode-to-cathode resistance of D13 and the collector-to-emitter/
base-to-emitter resistance.
Assumptions:
V
D13
V
Q12/13
I
OH
= 1[V
CC
–(V
D13
+ V
Q12/Q13
+ V
OH
)]/(R14 + R
D13
+ R
Q13
).
I
OH
(R14 = 12
) = –[4.5V–(0.5V + 1.2V + 2.0V)]/23
= –35mA
I
OH
(R14 = 30
) = –[4.5V–(0.5V + 1.2V + 2.0V)]/41
= –20mA
I
OS
= I
OH
@ V
OH
= 0.0V and V
CC
= 5.5V
I
OS
(R14 = 12
) = –[5.5V–(0.5V + 1.2V)]/23
= –165mA
I
OS
(R14 = 30
) = –[5.5V–(0.5V + 1.2V)]/41
= –93mA
0.5V @ R
ON
= 3
@ 25
°
C),
1.2V @ R
ON
= 8
@ 25
°
C)
Obviously, we have been very conservative in the I
OH
specification
to guardband against all conditions of temperature and
input/output/supply voltage levels. The R
ON
resistances of the
output pullup transistors and blocking diode are large enough to
prevent I
OS
from exceeding –225mA for R14 = 12
and –150mA for
R14 = 30
. (Refer to Table 1.)
Table 1. Family Output Drive Capabilities Using the 74F657 Parity Bus Transceiver
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions, V
IL
= MAX and V
IH
= MIN)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
All outputs
I
OH
= –3mA
I
OH
= –3mA
I
OH
= –15mA
I
OH
= –15mA
I
OL
= 24mA
I
OL
= 24mA
I
OL
= 48mA
I
OL
= 48mA
±
10% V
CC
±
5% V
CC
±
10% V
CC
±
5% V
CC
±
10% V
CC
±
5% V
CC
±
10% V
CC
±
5% V
CC
V
CC
= MAX
V
CC
= MAX
2.4
V
V
OH
High level output voltage
High-level output voltage
2.7
3.4
V
B port PARITY ERROR
port, PARITY, ERROR
2.0
V
2.0
V
A port
0.35
0.50
V
V
OL
Low level output voltage
Low-level output voltage
0.35
0.50
V
B port PARITY ERROR
port, PARITY, ERROR
0.40
0.55
V
0.40
0.55
V
I
OS
A
N
output High level short circuit current (R14 = 30
)
B
N
output High level short circuit current (R14 = 12
)
–150
mA
–225
mA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F30244N | 制造商:NXP Semiconductors 功能描述: |
| 74F3037 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input NAND 30ohm driver |
| 74F3037N | 制造商:NXP Semiconductors 功能描述: 制造商:SIG 功能描述: |
| 74F3038 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input NAND 30 ohm line driver open collector |
| 74F3038D | 制造商:NXP Semiconductors 功能描述:30-OHM TRANS LINE DRIVER |
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