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參數(shù)資料
| 型號(hào)： | 74F378 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Hex D flip-flop with enable |
| 中文描述： | 六角D觸發(fā)器的使 |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大小： | 81K |
| 代理商： | 74F378 |
Philips Semiconductors
Product specification
74F378
Hex D flip-flop with enable
2
1989 Oct 05
853–0067 97804
FEATURES
6-bit high-speed parallel register
Positive edge-triggered D-type inputs
Fully buffered common Clock and Enable inputs
Input clamp diodes limit high speed termination effects
Fully TTL and CMOS compatible
DESCRIPTION
The 74F378 has six edge-triggered D-type flip-flops with individual
D inputs and Q outputs. The common buffered Clock (CP) input
loads all flip-flops simultaneously when the Enable (E) input is Low.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition is transformed to
the corresponding flop-flop’s Q output. The E input must be stable
one setup time prior to the Low-to-High clock transition for
predictable operation.
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
9
8
V
CC
E
Q0
D0
D1
Q1
D2
Q2
GND
Q5
D5
D4
Q4
D3
Q3
CP
SF00927
TYPE
TYPICAL f
max
TYPICAL SUPPLY
CURRENT (TOTAL)
74F378
100MHz
35mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL
RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
N74F378N
PKG DWG #
16–pin plastic DIP
SOT38-4
16–pin plastic SO
N74F378D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D5
Data inputs
1.0/1.0
20
μ
A/0.6mA
20
μ
A/0.6mA
20
μ
A/0.6mA
CP
Clock pulse input (active rising edge)
1.0/1.0
E
Enable input (active low)
1.0/1.0
Q0 – Q5
Data outputs
50/33
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20
μ
A in the High state and 0.6mA in the Low state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F378SJ | 3.3V, 80MHz 1:10 Output Non-Inverting Clock Driver, Industrial Temp. Operation |
| 74F378PC | Parallel D Register with Enable |
| 74F378SC | Parallel D Register with Enable |
| 74F378SJ | IC 10-OUTPUT CLOCK DRV 20SOIC |
| 74F378 | Parallel D-Type Register with Enable |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F378 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F378D | 制造商:NXP Semiconductors 功能描述:F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16 |
| 74F378N | 制造商:NXP Semiconductors 功能描述: |
| 74F378PC | 功能描述:觸發(fā)器 Parallel D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74F378SC | 功能描述:觸發(fā)器 Parallel D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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