參數(shù)資料
型號: 74FCT162H543CTPACT
廠商: Texas Instruments, Inc.
元件分類: 通用總線功能
英文描述: 16-Bit Latched Transceivers
中文描述: 16位鎖存收發(fā)器
文件頁數(shù): 1/8頁
文件大?。?/td> 70K
代理商: 74FCT162H543CTPACT
16-Bit Latched Transceivers
SCCS059 - August 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Copyright
2000, Texas Instruments Incorporated
Features
FCT-E speed at 3.4 ns
Power-off disable outputs permits live insertion
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of
40C to +85C
V
CC
= 5V
±
10%
CY74FCT16543T Features:
64 mA sink current, 32 mA source current
Typical V
OLP
(ground bounce) <1.0V at V
CC
= 5V,
T
A
= 25C
CY74FCT162543T Features:
Balanced 24 mA output drivers
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25C
CY74FCT162H543T Features:
Bus hold retains last active state
Eliminates the need for external pull-up or pull-down
resistors
Functional Description
The
high-speed,lowpowerlatchedtransceiversthatareorganizedastwo
independent 8-bit D-type latched transceivers containing twosets of
eight D-type latches with separate Latch Enable (LEAB, LEAB) and
Output Enable (OEAB, OEAB) controls for each set to permit
independent control of inputting and outputting in either direction of
data flow. For data flow from A to B, for example, the A-to-B input
Enable(CEAB)mustbeLOWinordertoenterdatafromAortotake
datafromBasindicatedinthetruthtable.WithCAEBLOW,aLOW
signal on the A-to-B Latch Enable(LEAB)makes the A-to-B latches
transparent; a subsequent LOW-to-HIGH transition of the LEAB
signal puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB both LOW,
thethree-stateBoutputbuffersareactiveandreflectthedatapresent
at the output of the A latches. Control of data from B to A is similar,
but uses CEAB, LEAB, and OEAB inputs flow-through pinout and
small shrink packaging and in simplifying board design. The output
buffers are designed with a power-off disable feature to allow live
insertion of boards.
The
CY74FCT16543T
is
high-capacitance loads and low-impedance backplanes.
The CY74FCT162543T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162543T is ideal for driving transmission lines.
The CY74FCT162H543T is a 24-mA balanced output part that
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.
CY74FCT16543T and CY74FCT162543T are 16-bit,
ideally
suited
for
driving
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