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參數(shù)資料
| 型號： | 74HC138 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 3-to-8 line decoder/demultiplexer; inverting |
| 中文描述： | 3至8線路解碼器/解復(fù)用器;反相 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 50K |
| 代理商： | 74HC138 |
September 1993
2
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
FEATURES
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT138 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT138 decoders accept three binary
weighted address inputs (A
0
, A
1
, A
2
) and when enabled,
provide 8 mutually exclusive active LOW outputs (Y
0
to
Y
7
).
The “138” features three enable inputs: two active LOW
(E
1
and E
2
) and one active HIGH (E
3
). Every output will be
HIGH unless E
1
and E
2
are LOW and E
3
is HIGH.
This multiple enable function allows easy parallel
expansion of the “138” to a 1-of-32 (5 lines to 32 lines)
decoder with just four “138” ICs and one inverter.
The ”138” can be used as an eight output demultiplexer by
using one of the active LOW enable inputs as the data
input and the remaining enable inputs as strobes. Unused
enable inputs must be permanently tied to their
appropriate active HIGH or LOW state.
The ”138” is identical to the “238” but has inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
propagation delay
A
n
to Y
n
E
3
to Y
n
E
n
to Y
n
input capacitance
power dissipation capacitance per package
C
L
= 15 pF; V
CC
= 5 V
t
PHL
/ t
PLH
t
PHL
/ t
PLH
12
14
17
19
ns
ns
C
I
C
PD
3.5
67
3.5
67
pF
pF
notes 1 and 2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC138_12 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-to-8 line decoder/demultiplexer; inverting |
| 74HC138AP | 制造商:Toshiba America Electronic Components 功能描述: |
| 74HC138BQ | 制造商:NXP Semiconductors 功能描述:IC 3-8 LINE DECODER/DEMUX DHVQFN16 制造商:NXP Semiconductors 功能描述:IC, 3-8 LINE DECODER/DEMUX, DHVQFN16 制造商:NXP Semiconductors 功能描述:IC, 3-8 LINE DECODER/DEMUX, DHVQFN16, Logic Type:3-to-8 Line Decoder / Demultiplexer, No. of Outputs:8, Supply Voltage Min:2V, Supply Voltage Max:6V, Logic Case Style:DHVQFN, No. of Pins:16, Operating Temperature Min:-40C, Operating, RoHS Compliant: Yes |
| 74HC138BQ,115 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3-TO-8 LINE DECODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74HC138BQ@115 | 制造商:NXP Semiconductors 功能描述:Decoder/Demultiplexer Single 3-to-8 16-Pin DHVQFN EP T/R |
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