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參數(shù)資料
| 型號(hào)： | 74HC14 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Hex inverting Schmitt trigger |
| 中文描述： | 六反相施密特觸發(fā)器 |
| 文件頁(yè)數(shù)： | 2/23頁(yè) |
| 文件大小： | 120K |
| 代理商： | 74HC14 |
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2003 Oct 30
2
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
74HC14; 74HCT14
FEATURES
Applications:
– Wave and pulse shapers
– Astable multivibrators
– Monostable multivibrators.
Complies with JEDEC standard no. 7A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from
40 to +85
°
C and
40 to +125
°
C.
DESCRIPTION
The 74HC14 and 74HCT14 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74HC14 and 74HCT14 provide six inverting buffers
with Schmitt-trigger action. They are capable of
transforming slowly changing input signals into sharply
defined, jitter-free output signals.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
For type 74HC14 the condition is V
I
= GND to V
CC
.
For type 74HCT14 the condition is V
I
= GND to V
CC
1.5 V.
2.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/t
PLH
C
I
C
PD
propagation delay nA to nY
input capacitance
power dissipation capacitance per gate notes 1 and 2
C
L
= 15 pF; V
CC
= 5 V 12
17
3.5
8
ns
pF
pF
3.5
7
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