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參數(shù)資料
| 型號(hào)： | 74HCT4040N,652 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COUNTER 12STAGE BINARY 16DIP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 系列： | 74HCT |
| 邏輯類型： | 二進(jìn)制計(jì)數(shù)器 |
| 方向： | 上 |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 12 |
| 復(fù)位： | 異步 |
| 計(jì)數(shù)速率： | 79MHz |
| 觸發(fā)器類型： | 負(fù)邊沿 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
| 其它名稱： | 568-1546-5 74HCT4040N 933670330652 |
1.
General description
The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP),
an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to
Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears
all counter stages and forces all outputs LOW, independent of the state of CP. Each
counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2.
Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC4040: CMOS level
For 74HCT4040: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 Cto+85 C and from 40 Cto+125 C
3.
Applications
Frequency dividing circuits
Time delay circuits
Control counters
4.
Ordering information
74HC4040; 74HCT4040
12-stage binary ripple counter
Rev. 4 — 20 March 2014
Product data sheet
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC4040N
40 C to +125 C
DIP16
plastic dual in-line package; 16 leads (300 mil);
long body
SOT38-1
74HCT4040N
74HC4040D
40 C to +125 C
SO16
plastic small outline package; 16 leads; body
width 3.9 mm
SOT109-1
74HCT4040D
74HC4040DB
40 C to +125 C
SSOP16
plastic shrink small outline package; 16 leads; body
width 5.3 mm
SOT338-1
74HCT4040DB
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