參數(shù)資料
型號(hào): 74HCT4059N,112
廠商: NXP Semiconductors
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC COUNTER PROGRAM DIV X N 24DIP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 15
系列: 74HCT
邏輯類型: 除以 N
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 16
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 36MHz
觸發(fā)器類型: 正邊沿
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 24-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 24-DIP
包裝: 管件
產(chǎn)品目錄頁面: 837 (CN2011-ZH PDF)
其它名稱: 568-1550-5
74HCT4059N
933757420112
1998 Jul 08
10
Philips Semiconductors
Product specication
Programmable divide-by-n counter
74HC/HCT4059
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC) for a unit load of 1 is given in the family specifications.
To determine
ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
Note
1. From master preset mode to any other mode.
INPUT
UNIT LOAD COEFFICIENT
CP
0.65
LE
0.65
Jn
0.50
Ka
1.00
Kb
1.50
Kc
0.85
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT
VCC
(V)
WAVEFORMS
+25
40 to +85 40 to +125
min. typ. max. min. max.
min. max.
tPHL/ tPLH
propagation delay
CP to Q
24
46
58
69
ns
4.5
Fig.7
tPHL/ tPLH
propagation delay
LE to Q
24
46
58
69
ns
4.5
Fig.8
tTHL/ tTLH
output transition time
7
15
19
22
ns
4.5
Fig.7
tW
clock pulse width
CP
20
7
25
30
ns
4.5
Fig.7
trem
removal time
Kb, Kc to CP
15
7
9
22
ns
4.5
Fig.9; note 1
fmax
maximum clock pulse
frequency
21
36
17
14
MHz
4.5
Fig.7
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