參數資料
| 型號： | 74HCT9115N,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 2/7頁 |
| 文件大小： | 0K |
| 描述： | IC BUFF NINE SCHMT TIG 20PDIP |
| 產品培訓模塊： | Logic Packages |
| 標準包裝： | 18 |
| 系列： | 74HCT |
| 邏輯類型： | 施密特觸發(fā)器 - 帶開漏極的緩沖器 |
| 元件數： | 9 |
| 每個元件的位元數： | 1 |
| 輸出電流高，低： | 6mA，6mA |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 20-DIP |
| 包裝： | 管件 |
| 其它名稱： | 568-2918-5 933987860112 |
December 1990
2
Philips Semiconductors
Product specication
Nine wide Schmitt trigger buffer;
open drain outputs
74HC/HCT9115
FEATURES
Schmitt trigger action on all data inputs
Output capability: standard (open drain)
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT9115 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT9115 are nine wide Schmitt trigger buffer
with open drain outputs and Schmitt trigger inputs.
The Schmitt trigger action in the data inputs transform
slowly changing input signals into sharply defined
jitter-free output signals.
The 74HC/HCT9115 have open-drain N-transistor
outputs, which are not clamped by a diode connected to
VCC. In the OFF-state, i.e. when one input is HIGH, the
output may be pulled to any voltage between GND and
VOmax. This allows the device to be used as a
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital
operation and OR-tied output applications, these devices
must have a pull-up resistor to establish a logic HIGH level.
The “9115” is identical to the “9114” but has non-inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLZ
propagation delay An to Yn
CL = 15 pF; VCC = 5 V
12
13
ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
5
pF
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