參數(shù)資料
型號： 74LCX125MTCX_NL
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 通用總線功能
英文描述： Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs
中文描述： LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
封裝： 4.40 MM, LEAD FREE, MO-153AB, TSSOP-14
文件頁數(shù)： 1/12頁
文件大?。?/td> 216K
代理商： 74LCX125MTCX_NL
1/12
September 2004
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5V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
t
PD
= 5.2 ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
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DESCRIPTION
The 74LCX125 is a low voltage CMOS QUAD
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
The device requires the 3-STATE control input G
to be set high to place the output in to the high
impedance state.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX125
LOW VOLTAGE CMOS QUAD BUS BUFFER (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
TSSOP
74LCX125MTR
74LCX125TTR
TSSOP
SOP
Rev. 5
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