參數(shù)資料
型號: 74LCX162374MTD
廠商: Fairchild Semiconductor
文件頁數(shù): 4/10頁
文件大小: 0K
描述: IC FLIP FLOP 16BIT D LV 48TSSOP
標(biāo)準(zhǔn)包裝: 38
系列: 74LCX
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
頻率 - 時(shí)鐘: 170MHz
延遲時(shí)間 - 傳輸: 7ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 12mA,12mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
包裝: 管件
3
www.fairchildsemi.com
7
4LCX162374
Functional Description
The
LCX162374
consists
of
sixteen
edge-triggered
flip-flops with individual D-type inputs and 3-STATE true
outputs. The device is byte controlled with each byte func-
tioning identically, but independent of the other. The control
pins can be shorted together to obtain full 16-bit operation.
Each byte has a buffered clock and buffered Output Enable
common to all flip-flops within that byte. The description
which follows applies to each byte. Each flip-flop will store
the state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CPn)
transition. With the Output Enable (OEn) LOW, the con-
tents of the flip-flops are available at the outputs. When
OEn is HIGH, the outputs go to the high impedance state.
Operation of the OEn input does not affect the state of the
flip-flops.
Logic Diagrams
Byte 1 (0:7)
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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