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參數(shù)資料
| 型號： | 74LCX16543MTDX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC REGISTERED TXRX 16BIT 56TSSOP |
| 標準包裝： | 1 |
| 系列： | 74LCX |
| 邏輯類型： | 寄存收發(fā)器，非反相 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 16 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應商設備封裝： | 56-TSSOP |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 1211 (CN2011-ZH PDF) |
| 其它名稱： | 74LCX16543MTDXDKR |
www.fairchildsemi.com
2
74LCX16543
Pin Descriptions
Data I/O Control Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn
Functional Description
The LCX16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the
A-to-B Enable (CEABn) input must be LOW in order to
enter data from A0–A15 or take data from B0–B15, as indi-
cated in the Data I/O Control Table. With CEABn LOW, a
LOW signal on the A-to-B Latch Enable (LEABn) input
makes the A-to-B latches transparent; a subsequent LOW-
to-HIGH transition of the LEABn signal puts the A latches in
the storage mode and their outputs no longer change with
the A inputs. With CEABn and OEABn both LOW, the
3-STATE B output buffers are active and reflect the data
present at the output of the A latches. Control of data flow
from B to A is similar, but using the CEBAn, LEBAn and
OEBAn inputs.
Pin Names
Description
OEABn
A-to-B Output Enable Input (Active LOW)
OEBAn
B-to-A Output Enable Input (Active LOW)
CEABn
A-to-B Enable Input (Active LOW)
CEBAn
B-to-A Enable Input (Active LOW)
LEABn
A-to-B Latch Enable Input (Active LOW)
LEBAn
B-to-A Latch Enable Input (Active LOW)
A0–A15
A-to-B Data Inputs or B-to-A 3-STATE Outputs
B0–B15
B-to-A Data Inputs or A-to-B 3-STATE Outputs
Inputs
Latch Status
Output Buffers
CEABn
LEABn
OEABn
(Byte n)
H
X
Latched
High Z
X
H
X
Latched
—
L
X
Transparent
—
XX
H
—
High Z
LX
L
—
Driving
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX16646 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs |
| 74LCX16646MEA | 功能描述:總線收發(fā)器 16-Bit Reg Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16646MEA_Q | 功能描述:總線收發(fā)器 16-Bit Reg Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16646MEAX | 功能描述:總線收發(fā)器 16-Bit Reg Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16646MTD | 功能描述:總線收發(fā)器 16-Bit Reg Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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