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參數(shù)資料
| 型號(hào)： | 74LCX32500 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Octal Buffers And Line Drivers With 3-State Outputs 20-SSOP -40 to 85 |
| 中文描述： | 低電壓36位通用總線收發(fā)器和5V容限輸入和輸出 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 85K |
| 代理商： | 74LCX32500 |
2002 Fairchild Semiconductor Corporation
DS500406
www.fairchildsemi.com
April 2001
Revised June 2002
7
74LCX32500
Low Voltage 36-Bit Universal Bus Transceivers
with 5V Tolerant Inputs and Outputs
General Description
These 36-bit universal bus transceivers combine D-type
latches and D-type flip-flops to allow data flow in transpar-
ent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs.
The LCX32500 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with the capability of interfacing to a 5V
signal environment.
The LCX32500 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power.
Features
I
5V tolerant inputs and outputs
I
2.3V–3.6V V
CC
specifications provided
I
6.0 ns t
PD
max (V
CC
=
3.3V), 20
μ
A I
CC
max
I
Power down high impedance inputs and outputs
I
Supports live insertion/withdrawal (Note 1)
I
±
24 mA output drive (V
CC
=
3.0V)
I
Uses patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 500 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
I
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE tied to GND through a resistor: the minimum
value or the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2:
Ordering code
“
G
”
indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter
“
X
”
to the ordering code.
Order Number
74LCX32500G
(Note 2)(Note 3)
Package Number
BGA114A
Package Description
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
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| 74LCX32500G | 功能描述:總線收發(fā)器 UB Transceiver LV 36Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX32500GX | 功能描述:總線收發(fā)器 UB Transceiver LV 36Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX32646 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 32-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs (Preliminary) |
| 74LCX32646GX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 32-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs (Preliminary) |
| 74LCX32652 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs (Preliminary) |
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