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參數(shù)資料
| 型號(hào)： | 74LS298 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Quad 2-Port Register Multiplexer with Storage |
| 中文描述： | 四2端口復(fù)用器注冊(cè)與存儲(chǔ) |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大小： | 43K |
| 代理商： | 74LS298 |
2000 Fairchild Semiconductor Corporation
DS009826
www.fairchildsemi.com
October 1988
Revised March 2000
DM74LS298
Quad
2-Por
tRegist
er
Mult
ipl
exer
wit
h
S
tora
g
e
DM74LS298
Quad 2-Port Register Multiplexer with Storage
General Description
The DM74LS298 is a quad 2-port register. It is the logical
equivalent of a quad 2-input multiplexer followed by a quad
4-bit edge-triggered register. A Common Select input
selects between two 4-bit input ports (data sources). The
selected data is transferred to the output register synchro-
nous with the HIGH-to-LOW transition of the Clock input.
Features
s Select from two data sources
s Fully edge-triggered operation
s Typical power dissipation of 65 mW
Ordering Code:
Logic Symbol
VCC = Pin 16
GND
= Pin 8
Pin Descriptions
Connection Diagram
Truth Table
l
= LOW Voltage Level one setup time prior to the HIGH-to-LOW clock
transition.
h
= HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock
transition.
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Order Number
Package Number
Package Description
DM74LS298N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
S
Common Select Inputs
CP
Clock Pulse Input (Active Falling Edge)
I0a, I0d
Source 0 Data Inputs
I1a, I1d
Source 1 Data Inputs
Qa, Qd
Flip-Flip Outputs
Inputs
Output
SI0x
I1x
Qx
ll
X
L
lh
X
H
hX
l
L
hX
h
H
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| 74LS298 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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| 74LS298PC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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