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參數(shù)資料
| 型號(hào)： | 74LV109 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual JK flip-flop with set and reset; positive-edge trigger |
| 中文描述： | 雙JK觸發(fā)器設(shè)置和復(fù)位觸發(fā)器，積極邊緣觸發(fā) |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大小： | 124K |
| 代理商： | 74LV109 |
Philips Semiconductors
Product specification
74LV109
Dual JK flip-flop with set and reset; positive-edge trigger
1998 Apr 20
7
AC WAVEFORMS
V
M
= 1.5 V at V
CC
≥
2.7 V;
V
M
= 0.5
×
V
CC
at V
CC
<
2.7 V;
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
The shaded areas indicate when the input is permitted to change
for predictable output performance.
SV00522
1/fmax
th
th
tPLH
tPHL
tPLH
tPHL
tW
tsu
tsu
VM
VM
VM
VM
nJ, nK
INPUT
GND
nCP
INPUT
GND
nQ
OUTPUT
VI
VI
VOH
VOH
nQ
OUTPUT
VOL
VOL
Figure 1. Clock (nCP) to output (nQ, nQ) propagation delays,
the clock pulse width, the nJ and nK to nCP set-up, the nCP to
nJ, nK hold times and the maximum clock pulse frequency.
SV00523
t
W
t
W
t
PLH
t
PHL
t
rem
V
M
V
M
V
M
V
M
V
M
nS
D
INPUT
GND
nR
D
INPUT
GND
nCP
INPUT
GND
nQ
OUTPUT
V
OH
nQ
V
l
V
l
V
l
V
OH
V
OL
V
OL
OUTPUT
t
rem
t
PLH
t
PHL
Figure 2. Set (nS
D
) and reset (nR
D
) input to output (nQ, nQ)
propagation delays, the set and reset pulse widths and the nR
D
,
nS
D
to nCP removal time.
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
R
L
= 1k
V
CC
Test Circuit for switching times
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
V
CC
V
I
< 2.7V
V
CC
TEST
t
PLH/
t
PHL
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
50pF
SV00901
2.7–3.6V
2.7V
Figure 3. Load circuitry for switching times.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV109D | CMOS |
| 74LV109DB | Dual JK flip-flop with set and reset; positive-edge trigger |
| 74LV109N | CMOS/TTL Compatible |
| 74LV109PW | Dual JK flip-flop with set and reset; positive-edge trigger |
| 74LV109PWDH | Dual JK flip-flop with set and reset; positive-edge trigger |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV109D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual JK flip-flop with set and reset; positive-edge trigger |
| 74LV109DB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual JK flip-flop with set and reset; positive-edge trigger |
| 74LV109DB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| 74LV109D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| 74LV109N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual JK flip-flop with set and reset; positive-edge trigger |
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