參數(shù)資料
型號: 74LV4020D,112
廠商: NXP Semiconductors
文件頁數(shù): 10/10頁
文件大?。?/td> 0K
描述: IC 14BIT BINARY RIPPLE 16-SOIC
產(chǎn)品培訓(xùn)模塊: Logic Packages
標準包裝: 1,000
系列: 74LV
邏輯類型: 二進制計數(shù)器
方向:
元件數(shù): 1
每個元件的位元數(shù): 14
復(fù)位: 異步
計數(shù)速率: 100MHz
觸發(fā)器類型: 負邊沿
電源電壓: 1 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SO
包裝: 管件
74LV4020_1
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 29 November 2005
9 of 20
Philips Semiconductors
74LV4020
14-stage binary ripple counter
12. Dynamic characteristics
Table 8:
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF; for test circuit see Figure 9.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 °C to +85 °C [1]
tPHL,
tPLH
propagation delay
CP to Q0
VCC = 1.2 V
-
60
-
ns
VCC = 2.0 V
-
27
43
ns
VCC = 2.7 V
-
19
31
ns
VCC = 3.0 V to 3.6 V
-
16
26
ns
VCC = 4.5 V to 5.5 V
-
11
17
ns
VCC = 3.3 V; CL = 15 pF
-
12
-
ns
Qn to Q(n+1)
VCC = 1.2 V
-
40
-
ns
VCC = 2.0 V
-
18
29
ns
VCC = 2.7 V
-
13
21
ns
VCC = 3.0 V to 3.6 V
-
11
18
ns
VCC = 4.5 V to 5.5 V
-
7
12
ns
VCC = 3.3 V; CL = 15 pF
-
7
-
ns
tPHL
propagation delay
MR to Qn
VCC = 1.2 V
-
55
-
ns
VCC = 2.0 V
-
27
44
ns
VCC = 2.7 V
-
19
31
ns
VCC = 3.0 V to 3.6 V
-
16
26
ns
VCC = 4.5 V to 5.5 V
-
11
17
ns
VCC = 3.3 V; CL = 15 pF
-
16
-
ns
tW
pulse width
CP (HIGH and LOW)
VCC = 2.0 V
35
7
-
ns
VCC = 2.7 V
25
5
-
ns
VCC = 3.0 V to 3.6 V
20
4
-
ns
VCC = 4.5 V to 5.5 V
15
3
-
ns
MR (HIGH)
VCC = 2.0 V
35
11
-
ns
VCC = 2.7 V
25
9
-
ns
VCC = 3.0 V to 3.6 V
20
8
-
ns
VCC = 4.5 V to 5.5 V
15
7
-
ns
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