參數(shù)資料
型號(hào): 74LVC16244ADGG,112
廠商: NXP Semiconductors
文件頁數(shù): 3/19頁
文件大小: 0K
描述: IC BUFF DVR TRI-ST 16BIT 48TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 39
系列: 74LVC
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 4
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
其它名稱: 568-8316-5
74LVC16244ADG
74LVC16244ADG-ND
74LVC16244ADGG,112-ND
74LVC16244ADGG,512
74LVC16244ADGG,512-ND
935235150112
74LVC_LVCH16244A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 13 — 7 February 2014
11 of 19
NXP Semiconductors
74LVC16244A; 74LVCH16244A
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9.
Test circuit for measuring switching times
VM
tW
10 %
90 %
0 V
VI
negative
pulse
positive
pulse
0 V
VM
90 %
10 %
tf
tr
tf
001aae331
VEXT
VCC
VI
VO
DUT
CL
RT
RL
G
Table 9.
Test data
Supply voltage
Input
Load
VEXT
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
1.2 V
VCC
2 ns
30 pF
1 k
open
2
V
CC
GND
1.65 V to 1.95 V
VCC
2 ns
30 pF
1 k
open
2
V
CC
GND
2.3 V to 2.7 V
VCC
2 ns
30 pF
500
open
2
V
CC
GND
2.7V
2.5 ns
50 pF
500
open
2
V
CC
GND
3.0Vto 3.6V
2.7V
2.5 ns
50 pF
500
open
2
V
CC
GND
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