參數(shù)資料
型號: 74LVC1G07GW,165
廠商: NXP Semiconductors
文件頁數(shù): 16/18頁
文件大?。?/td> 0K
描述: IC BUFF OPEN DRAIN N-INV 5TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 10,000
系列: 74LVC
邏輯類型: 緩沖器/線路驅(qū)動器,非反相并帶開漏極
元件數(shù): 1
每個元件的位元數(shù): 1
輸出電流高,低: 32mA,32mA
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應(yīng)商設(shè)備封裝: 5-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74LVC1G07GW-R
74LVC1G07GW-R-ND
935266681165
74LVC1G07
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 11 — 29 June 2012
7 of 18
NXP Semiconductors
74LVC1G07
Buffer with open-drain output
Table 9.
Measurement points
Supply voltage
Input
Output
VCC
VM
VX
1.65 V to 1.95 V
0.5VCC
VOL + 0.15 V
2.3 V to 2.7 V
0.5VCC
VOL + 0.15 V
2.7 V
1.5 V
VOL + 0.3 V
3.0 V to 3.6 V
1.5 V
VOL + 0.3 V
4.5 V to 5.5 V
0.5VCC
VOL + 0.3 V
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9.
Test circuit for measuring switching times
VEXT
VCC
VI
VO
mna616
DUT
CL
RT
RL
G
Table 10.
Test data
Supply voltage
Input
Load
VEXT
VCC
VI
tr, tf
CL
RL
tPZL, tPLZ
1.65 V to 1.95 V
VCC
2.0 ns
30 pF
1 k
2VCC
2.3 V to 2.7 V
VCC
2.0 ns
30 pF
500
2VCC
2.7 V
2.5 ns
50 pF
500
6 V
3.0 V to 3.6 V
2.7 V
2.5 ns
50 pF
500
6 V
4.5 V to 5.5 V
VCC
2.5 ns
50 pF
500
2VCC
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