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參數(shù)資料
| 型號： | 74LVC1G58GM,132 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONFIG MULTI-FUNC GATE 6XSON |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 特色產(chǎn)品： | MicroPak? |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 系列： | 74LVC |
| 邏輯類型： | 可配置多功能 |
| 電路數(shù)： | 1 |
| 輸入數(shù)： | 3 |
| 施密特觸發(fā)器輸入： | 是 |
| 輸出類型： | 單端 |
| 輸出電流高，低： | 32mA，32mA |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-XFDFN |
| 供應(yīng)商設(shè)備封裝： | 6-XSON，SOT886（1.45x1） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 74LVC1G58GM-H 74LVC1G58GM-H-ND 935277212132 |
2009-2012 Microchip Technology Inc.
Preliminary
DS41393B-page 17
AR1000 SERIES RESISTIVE TOUCH SCREEN CONTROLLER
4.0
I2CTM COMMUNICATIONS
The AR1021 is an I2C slave device with a 7-bit address
of 0x4D, supporting up to 400 kHz bit rate.
A master (host) device interfaces with the AR1021.
4.1
I2C Hardware Interface
A summary of the hardware interface pins is shown
below in Table 4-1.
M1 Pin
The M1 pin must be connected to VSS to config-
ure the AR1021 for I2C communications.
SCL Pin
The SCL (Serial Clock) pin is electrically
open-drain and requires a pull-up resistor, typi-
cally 2.2 K
to 10 K, from SCL to VDD.
SCL Idle state is high.
SDA Pin
The SDA (Serial Data) pin is electrically
open-drain and requires a pull-up resistor, typi-
cally 2.2K
to 10K, from SDA to VDD.
SDA Idle state is high.
Master write data is latched in on SCL rising
edges.
Master read data is latched out on SCL falling
edges to ensure it is valid during the subsequent
SCL high time.
SDO Pin
The SDO pin is a driven output interrupt to the
master.
SDO Idle state is low.
SDO will be asserted high when the AR1021 has
data ready (touch report or command response)
for the master to read.
TABLE 4-1:
I2C HARDWARE INTERFACE
AR1021 Pin
Description
M1
Connect to VSS to select I2C communications
SCL
Serial Clock to master I2C
SDA
Serial Data to master I2C
SDO
Data ready interrupt output to master
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| 74LVC1G58GM-G | 功能描述:邏輯門 3.3V LP CONFIG GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G58GM-H | 功能描述:邏輯門 3.3V LP CONFIG GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G58GN | 制造商:NXP Semiconductors 功能描述:IC CONFIG MULTI-FUNC GATE XS |
| 74LVC1G58GN,132 | 功能描述:邏輯門 Low-Power multiple function gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G58GS,132 | 功能描述:轉(zhuǎn)換 - 電壓電平 18ns 5.5V 250mW RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
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