參數(shù)資料
型號(hào)： 74LVC244ATTR
廠商： 意法半導(dǎo)體
英文描述： LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE
中文描述： 低電壓CMOS四總線緩沖器（三態(tài)）高性能
文件頁(yè)數(shù)： 1/9頁(yè)
文件大?。?/td> 180K
代理商： 74LVC244ATTR
1/9
February 2002
I
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 5.9ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V (1.2V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 244
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
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DESCRIPTION
The 74LVC244A is a low voltage CMOS OCTAL
BUS
BUFFER
(3-STATE)
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for 1.65 to 3.6
V
CC
operations and low power and low noise
applications.
fabricated
with
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
G control output governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVC244A
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)
HIGH PERFORMANCE
.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
TSSOP
74LVC244AM
74LVC244AMTR
74LVC244ATTR
TSSOP
SOP
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