參數(shù)資料
型號: 74LVC3G04
廠商: NXP Semiconductors N.V.
英文描述: Triple inverter
中文描述: 3個反相器
文件頁數(shù): 1/14頁
文件大?。?/td> 79K
代理商: 74LVC3G04
1.
General description
The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
The inputs can be driven from either 3.3 Vor 5 V devices. This feature allows the use of
this device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
off
. The I
off
circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC3G34 provides three buffers.
2.
Features
I
Wide supply voltage range from 1.65 V to 5.5 V
I
5 V tolerant input/output for interfacing with 5 V logic
I
High noise immunity
I
Complies with JEDEC standard:
N
JESD8-7 (1.65 V to 1.95 V)
N
JESD8-5 (2.3 V to 2.7 V)
N
JESD8-B/JESD36 (2.7 V to 3.6 V).
I
ESD protection:
N
HBM EIA/JESD22-A114-B exceeds 2000 V
N
MM EIA/JESD22-A115-A exceeds 200 V.
I
±
24 mA output drive (V
CC
= 3.0 V)
I
CMOS low power consumption
I
Latch-up performance exceeds 250 mA
I
Direct interface with TTL levels
I
Multiple package options
I
Specified from
40
°
C to +85
°
C and
40
°
C to +125
°
C.
74LVC3G34
Triple buffer gate
Rev. 03 — 31 January 2005
Product data sheet
相關(guān)PDF資料
PDF描述
74LVC3G07 Triple buffer with open-drain output
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74LVC3G17 Hex Inverting Buffers And Line Drivers With 3-State Outputs 16-SO -40 to 85
74LVC3G14 Hex Inverting Buffers And Line Drivers With 3-State Outputs 16-SOIC -40 to 85
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