參數(shù)資料
型號: 74LVC574ADB,118
廠商: NXP Semiconductors
文件頁數(shù): 18/19頁
文件大小: 0K
描述: IC OCT D FF POS-EDG TRIG 20SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1
系列: 74LVC
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
延遲時(shí)間 - 傳輸: 9ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 568-7688-6
74LVC574A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 18 December 2012
8 of 19
NXP Semiconductors
74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(C
L VCC
2
f
o) = sum of the outputs
tW
pulse width
clock HIGH or LOW; see Figure 7
VCC = 1.65 V to 1.95 V
5.0
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
4.0
-
ns
VCC = 2.7 V
3.3
-
3.3
-
ns
VCC = 3.0 V to 3.6 V
3.3
1.7
-
3.3
-
ns
tsu
set-up time
Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V
4.0
-
4.0
-
ns
VCC = 2.3 V to 2.7 V
2.5
-
2.5
-
ns
VCC = 2.7 V
2.0
-
2.0
-
ns
VCC = 3.0 V to 3.6 V
2.0
0.3
-
2.0
-
ns
th
hold time
Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V
3.0
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.0
-
2.0
-
ns
VCC = 2.7 V
1.5
-
1.5
-
ns
VCC = 3.0 V to 3.6 V
+1.5
0.2
-
+1.5
-
ns
fmax
maximum
frequency
VCC = 1.65 V to 1.95 V
100
-
80
-
MHz
VCC = 2.3 V to 2.7 V
125
-
100
-
MHz
VCC = 2.7 V
150
-
120
-
MHz
VCC = 3.0 V to 3.6 V
150
200
-
120
-
MHz
tsk(0)
output skew time
VCC = 3.0 V to 3.6 V
-
1.0
-
1.5
ns
CPD
power dissipation
capacitance
per flip-flop; VI = GND to VCC
VCC = 1.65 V to 1.95 V
-
11.2
-
pF
VCC = 2.3 V to 2.7 V
-
13.2
-
pF
VCC = 3.0 V to 3.6 V
-
14.9
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
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74LVC574ADTR2G 功能描述:IC FLIP FLOP OCTAL D 20TSSOP 制造商:on semiconductor 系列:- 包裝:帶卷(TR) 零件狀態(tài):有效 功能:標(biāo)準(zhǔn) 類型:D 型 輸出類型:三態(tài),非反相 元件數(shù):1 每元件位數(shù):8 頻率 - 時(shí)鐘:200MHz 不同 V,最大 CL 時(shí)的最大傳播延遲:7ns @ 3.3V,50pF 觸發(fā)器類型:正邊沿 電流 - 輸出高,低:24mA,24mA 電壓 - 電源:1.65 V ~ 3.6 V 電流 - 靜態(tài):10μA 輸入電容:5pF 工作溫度:-40°C ~ 125°C(TA) 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 標(biāo)準(zhǔn)包裝:2,500
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