參數(shù)資料
型號: 74LVC74ADB,112
廠商: NXP Semiconductors
文件頁數(shù): 13/19頁
文件大小: 0K
描述: IC DUAL D FF POS-EDGE 14SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 78
系列: 74LVC
功能: 設(shè)置(預(yù)設(shè))和復(fù)位
類型: D 型
輸出類型: 差分
元件數(shù): 2
每個元件的位元數(shù): 1
頻率 - 時鐘: 250MHz
延遲時間 - 傳輸: 2.5ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SSOP(0.209",5.30mm 寬)
包裝: 管件
其它名稱: 74LVC74ADB
74LVC74ADB-ND
935260735112
74LVC74A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 7 — 20 November 2012
3 of 19
NXP Semiconductors
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
5.
Pinning information
5.1 Pinning
Fig 4.
Logic diagram for one flip-flop
mna421
SD
CP
RD
D
C
Q
C
Q
C
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5.
Pin configuration for SO14 and (T)SSOP14
Fig 6.
Pin configuration for DHVQFN14
74
1RD
VCC
1D
2RD
1CP
2D
1SD
2CP
1Q
2SD
1Q
2Q
GND
2Q
001aad106
1
2
3
4
5
6
7
8
10
9
12
11
14
13
001aad107
74
Transparent top view
1Q
2Q
1Q
2SD
1SD
2CP
1CP
2D
2RD
1D
GND(1)
GND
2Q
1RD
V
CC
6
9
5
10
4
11
3
12
2
13
7
8
1
14
terminal 1
index area
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