參數(shù)資料
型號(hào): 74LVCH16245ABQ,518
廠商: NXP Semiconductors
文件頁(yè)數(shù): 20/20頁(yè)
文件大小: 0K
描述: TXRX 16BIT NON-INV 3ST HUQFN60U
標(biāo)準(zhǔn)包裝: 1
系列: 74LVCH
邏輯類型: 收發(fā)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 60-UFQFN 雙排,裸焊盤
供應(yīng)商設(shè)備封裝: 60-HUQFN(4x6)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 568-5282-6
74LVC_LVCH16245A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 12 — 13 February 2012
9 of 20
NXP Semiconductors
74LVC16245A; 74LVCH16245A
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
[1]
All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25 C.
[2]
The bus hold circuit is switched off when VI >VCC allowing 5.5 V on the input terminal.
[3]
For I/O ports the parameter IOZ includes the input leakage current.
[4]
Valid for data inputs of bus hold parts only (74LVCH16245A). Note that control inputs do not have a bus hold circuit.
[5]
The specified sustaining current at the data input holds the input below the specified VI level.
[6]
The specified overdrive current at the data input forces the data input to the opposite input state.
10. Dynamic characteristics
IBHL
bus hold LOW
current [4][5]
VCC = 1.65; VI = 0.58 V
10
-
10
-
A
VCC = 2.3; VI = 0.7 V
30
-
25
-
A
VCC = 3.0; VI = 0.8 V
75
-
60
-
A
IBHH
bus hold HIGH
current [4][5]
VCC = 1.65; VI = 1.07 V
10
-
10
-
A
VCC = 2.3; VI = 1.7 V
30
-
25
-
A
VCC = 3.0; VI = 2.0 V
75
-
60
-
A
IBHLO
bus hold LOW
overdrive current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
IBHHO
bus hold HIGH
overdrive current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
Table 6.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Max
Min
Max
tpd
propagation
delay
nAn to nBn; nBn to nAn; see Figure 7
VCC = 1.2 V
-
13.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.2
12.2
1.5
13.8
ns
VCC = 2.3 V to 2.7 V
1.0
2.8
6.0
1.0
6.7
ns
VCC = 2.7 V
1.0
2.7
4.7
1.0
6.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.4
4.5
1.0
6.0
ns
ten
enable time
nOE to nAn, nBn; see Figure 8
VCC = 1.2 V
-
15.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.9
15.0
1.5
16.9
ns
VCC = 2.3 V to 2.7 V
1.0
3.3
7.9
1.0
8.8
ns
VCC = 2.7 V
1.5
3.5
6.7
1.5
8.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.7
5.5
1.0
7.0
ns
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