參數(shù)資料
型號(hào): 74LVT652DB,118
廠商: NXP Semiconductors
文件頁(yè)數(shù): 11/14頁(yè)
文件大小: 0K
描述: IC TRANSCVR 8BIT N-INV 24SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LVT
邏輯類型: 收發(fā)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 32mA,64mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 帶卷 (TR)
其它名稱: 74LVT652DB-T
74LVT652DB-T-ND
935167240118
Philips Semiconductors
Product specification
74LVT652
3.3V Octal transceiver/register, non-inverting
(3-State)
1998 Feb 19
6
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°C to +85°C
UNIT
MIN
TYP1
MAX
VIK
Input clamp voltage
VCC = 2.7V; IIK = –18mA
–0.9
–1.2
V
VCC = 2.7 to 3.6V; IOH = –100A
VCC-0.2
VCC-0.1
VOH
High-level output voltage
VCC = 2.7V; IOH = –8mA
2.4
2.5
V
VCC = 3.0V; IOH = –32mA
2.0
2.2
VCC = 2.7V; IOL = 100A
0.1
0.2
VCC = 2.7V; IOL = 24mA
0.3
0.5
VOL
Low-level output voltage
VCC = 3.0V; IOL = 16mA
0.25
0.4
V
VCC = 3.0V; IOL = 32mA
0.3
0.5
VCC = 3.0V; IOL = 64mA
0.4
0.55
VRST
Power-up output low voltage5
VCC = 3.6V; IO = 1mA; VI = GND or VCC
0.13
0.55
V
VCC = 3.6V; VI = VCC or GND
Control pins
±0.1
±1
VCC = 0 or 3.6V; VI = 5.5V
Control pins
1.0
10
II
Input leakage current
VCC = 3.6V; VI = 5.5V
4
1.0
20
A
VCC = 3.6V; VI = VCC
I/O Data pins4
0.1
1
VCC = 3.6V; VI = 0
–1
-5
IOFF
Output off current
VCC = 0V; VI or VO = 0 to 4.5V
1
±100
A
6
VCC = 3V; VI = 0.8V
75
150
IHOLD
Bus Hold current A inputs6
VCC = 3V; VI = 2.0V
–75
–150
A
VCC = 0V to 3.6V; VCC = 3.6V
±500
IEX
Current into an output in the
High state when VO > VCC
VO = 5.5V; VCC = 3.0V
60
125
A
IPU/PD
Power up/down 3-State output
current3
VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC;
OE/OE = Don’t care
15
±100
A
ICCH
VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0
0.13
0.19
ICCL
Quiescent supply current
VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0
3
12
mA
ICCZ
VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 0
0.13
0.19
ICC
Additional supply current per
input pin2
VCC = 3V to 3.6V; One input at VCC-0.6V,
Other inputs at VCC or GND
0.1
0.2
mA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND
3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a
transition time of 100
sec is permitted. This parameter is valid for Tamb = 25°C only.
4. Unused pins at VCC or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
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