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參數(shù)資料
| 型號(hào)： | 74LVT652PWDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V Octal transceiver/register, non-inverting 3-State |
| 中文描述： | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 110K |
| 代理商： | 74LVT652PWDH |
Philips Semiconductors
Product specification
74LVT652
3.3V Octal transceiver/register, non-inverting
(3-State)
1998 Feb 19
4
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74LVT652.
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
}
REAL TIME BUS TRANSFER
BUS B TO BUS A
OEAB OEBA CPAB CPBA SAB
L
L
X
SBA
L
X
X
}
REAL TIME BUS TRANSFER
BUS A TO BUS B
OEAB OEBA CPAB CPBA SAB
H
H
X
SBA
X
X
L
}
STORAGE FROM
A, B, OR A AND B
OEAB OEBA CPAB CPBA SAB
X
H
↑
L
X
X
L
H
↑
SBA
X
X
X
X
↑
↑
X
X
X
}
TRANSFER STORED DATA
TO A OR B
OEAB OEBA CPAB CPBA SAB
H
L
H | L H | L
SBA
H
H
A
A
A
A
B
B
B
B
SV00055
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OEAB
OEBA
CPAB
CPBA
SAB
SBA
An
Bn
L
L
H
H
H or L
↑
↑
↑
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
X
X
Input
Input
Isolation
Store A and B data
X
H
H
H
X
**
X
X
Input
Unspecified**
Output*
Store A, Hold B
Store A in both registers
L
L
X
L
H or L
↑
X
X
X
X
X
**
Unspecified**
Output*
Input
Hold A, Store B
Store B in both registers
L
L
L
L
X
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
H
H
H
X
H or L
X
X
L
H
X
X
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L
H or L
H
H
Output
Output
Stored A data to B bus
Stored B data to A bus
H =
L
X =
↑
=
*
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
=
**
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVT652PW-T | 功能描述:總線收發(fā)器 3.3V OCTAL REG XCVR 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVT74D | 功能描述:觸發(fā)器 3.3V DUAL D-TYPE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVT74D,112 | 功能描述:觸發(fā)器 3.3V DUAL D-TYPE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVT74D,118 | 功能描述:觸發(fā)器 DUAL D F/F POS-EDGE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVT74D/AUJ | 制造商:NXP Semiconductors 功能描述:74LVT74D/SO14/REEL13//AU - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP FLOP DUAL D-TYPE 14SOIC |
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