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參數(shù)資料
| 型號： | 74VCX245MTCX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 11/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCVR BIDIRECT LV 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | 74VCX |
| 邏輯類型： | 收發(fā)器，非反相 |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 1.4 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
9
INDUSTRIAL TEMPERATURERANGE
IDT72V73260 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 16,384 x 16,384
Figure 1. Example for Frame Alignment Measurement
TABLE 7 — FRAME ALIGNMENT REGISTER (FAR) BITS
0123
4
5
6
7
8
9
10
11
12
13
14
15
16
ST-BUS Frame
C32i
Offset Value
FE Input
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
GCI Frame
C32i
Offset Value
FE Input
(FD[11:0] = 06H)
(FD12 = 0, sample at CLK LOW phase)
(FD[11:0] = 09H)
(FD12 = 1, sample at CLK HIGH phase)
5932 drw04
Bit
Name
Description
15-14
Unused
Must be zero for normal operation
13
CFE (Complete
When Complete Frame Evaluation = 1, the Frame Evaluation is completed and bits FD12 to FD0 bits contains a valid frame alignment offset.
Frame Evaluation)
This bit is reset to zero, when Start Frame Evaluation bit in the Control Register is changed from 1 to 0.
12
FD12
The falling edge of Frame Evaluation (or rising edge for GCI mode) is sampled during the C32i-HIGH phase (FD12 = 1) or during the
(Frame Delay Bit 12) C32i-LOWphase(FD12=0).ThisbitallowsthemeasurementresolutiontoC32icycle.ThisbitisresettozerowhentheStartFrameEvaluation
bit of the Control Register changes from 1 to 0.
11-0
FD11-0
The binary value expressed in these bits refers to the measured input offset value. These bits are reset to zero when the Start Frame Evaluation
(Frame Delay Bits)
bit of the Control Register changes from 1 to 0. (FD11 – MSB, FD0 – LSB)
Reset Value:
0000H.
15
14
13
12
11
10
9876543210
0
CFE
FD12
FD11
FD10
FD9
FD8
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
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| 74VCX245WM | 功能描述:總線收發(fā)器 Bidir Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX245WM_Q | 功能描述:總線收發(fā)器 Bidir Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX245WMX | 功能描述:總線收發(fā)器 Bidir Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX32 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs |
| 74VCX32_ZAB3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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