參數(shù)資料
型號(hào)： 74VHC240SJX
廠(chǎng)商： Fairchild Semiconductor
文件頁(yè)數(shù)： 1/9頁(yè)
文件大小： 0K
描述： IC INVERTER DUAL 4-INPUT 20SOP
標(biāo)準(zhǔn)包裝： 2,000
系列： 74VHC
邏輯類(lèi)型： 逆變器，緩沖器
電路數(shù)： 2
輸入數(shù)： 4
特點(diǎn)： 三態(tài)
電源電壓： 2 V ~ 5.5 V
電流 - 靜態(tài)（最大值）： 4µA
輸出電流高，低： 8mA，8mA
邏輯電平 - 低： 0.5V
邏輯電平 - 高： 1.5V
額定電壓和最大 CL 時(shí)的最大傳播延遲： 7.5ns @ 5V，50pF
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
供應(yīng)商設(shè)備封裝： 20-SOP
封裝/外殼： 20-SOIC（0.209"，5.30mm 寬）
包裝： 帶卷 (TR)
tm
74VHC240
Octal
Buff
er/Line
Driver
with
3-ST
A
TE
Outputs
April 2007
1992 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHC240 Rev. 1.3
74VHC240
Octal Buffer/Line Driver with 3-STATE Outputs
Features
■ High Speed: tPD = 3.6ns (typ) at TA = 25°C
■ Low power dissipation: ICC = 4A (max) @ TA = 25°C
■ High noise immunity: VNIH = VNIL = 28% VCC (min.)
■ Power down protection is provided on all inputs
■ Low noise: VOLP = 0.9V (max.)
■ Pin and function compatible with 74HC240
General Description
The VHC240 is an advanced high speed CMOS octal
bus buffer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The VHC240 is an inverting 3-STATE
buffer having two active-LOW output enables. This
device is designed to drive buslines or buffer memory
address registers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Order Number
Package
Number
Package Description
74VHC240M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC240MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pin Names
Description
OE1, OE2
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
Outputs 3-STATE Outputs
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