2006 Teridian Semiconductor Corporation Rev. 2" />
參數(shù)資料
型號: 78P2351R-IMR/F
廠商: Maxim Integrated Products
文件頁數(shù): 7/31頁
文件大?。?/td> 0K
描述: IC LIU NRZ-CMI CONV 155M 56-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E4,OC-3,STM1-E
電源電壓: 3.15 V ~ 3.45 V
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤
供應商設備封裝: 56-QFN-EP(7x7)
包裝: 帶卷 (TR)
78P2351R
Serial 155M
NRZ to CMI Converter
Page: 15 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1
PIN DESCRIPTION (continued)
CONTROL PINS
NAME
PIN
TYPE
DESCRIPTION
LPBK
10
CIT
Loopback Selection:
Low: Normal operation
Float: Remote Loopback Enable: Recovered receive data and clock are
looped back to the transmitter for retransmission.
High: Local Loopback Enable: The transmit data is looped back and used
as the input to the receiver.
CKMODE
9
CIT
Clock Mode Selection:
Low: Reserved
Float: Reference clock is synchronous to transmit data. Clock is recovered
with a CDR and data is passed through a FIFO
High: Reference clock is plesiochronous to transmit data. Clock is
recovered with a CDR and the FIFO is bypassed
TXOUT1
56
CIT
Advanced Tx Control 1:
Low: Enables fixed LVPECL equalizer at the transmit inputs SIDP/N (for
FR4 trace lengths up to 1.5m).
Float: Normal operation
High: Normal operation
TXOUT0
1
CIT
Advanced Tx Control 0:
Low: Nominal amplitude
Float: 5% amplitude boost
High: 10% amplitude boost
TXPD
8
CID
Transmitter Power Down:
When high, powers down and tri-states the transmit driver.
SPSL
32
CID
Serial Port Selection:
When high, chip is software controlled through the 4-wire serial port.
CKSL
34
CIT
Reference Clock Frequency Selection:
Selects the reference frequency that is supplied at the CKREFP/N pins. Its level
is read in at power-up or on the rising edge of a reset signal at the PORB pin.
Low: 19.44MHz
Float: 77.76MHz
High: 155.52MHz
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