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參數(shù)資料
| 型號： | 79RC32334-100BBGI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT Interprise Integrated Communications Processor |
| 中文描述： | IDT的洽談會集成通信處理器 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 467K |
| 代理商： | 79RC32334-100BBGI |
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August 31, 2004
IDT 79RC32334—Rev. Y
◆
2KB of 2-way set associative data cache, capable of write-back
and write-through operation.
◆
Cache locking per line to speed real-time systems and critical
system functions
◆
On-chip TLB to enable multi-tasking in modern operating
systems
◆
EJTAG interface to enable sophisticated low-cost in-circuit
emulation.
Synchronous-DRAM Interface
The RC32334 integrates a SDRAM controller which provides direct
control of system SyncDRAM running at speeds to 75MHz.
Key capabilities of the SDRAM controller include:
◆
Direct control of 4 banks of SDRAM (up to 2 64-bit wide DIMMs)
◆
On-chip page comparators optimize access latency.
◆
Speeds to 75MHz
◆
Programmable address map.
◆
Supports 16, 64, 128, 256, or 512Mb SDRAM devices
◆
Automatic refresh generation driven by on-chip timer
◆
Support for discrete devices, SODIMM, or DIMM modules.
Thus, systems can take advantage of the full range of commodity
memory that is available, enabling system optimization for cost, real-
estate, or other attributes.
Local Memory and I/O Controller
The local memory and I/O controller implements direct control of
external memory devices, including the boot ROM as well as other
memory areas, and also implements direct control of external periph-
erals.
The local memory controller is highly flexible, allowing a wide range
of devices to be directly controlled by the RC32334 processor. For
example, a system can be built using an 8-bit boot ROM, 16-bit FLASH
cards (possibly on PCMCIA), a 32-bit SRAM or dual-port memory, and a
variety of low-cost peripherals.
Key capabilities include:
◆
Direct control of EPROM, FLASH, RAM, and dual-port memories
◆
6 chip-select outputs, supporting up to 64MB per memory space
◆
Supports mixture of 8-, 16-, and 32-bit wide memory regions
◆
Flexible timing protocols allow direct control of a wide variety of
devices
◆
Programmable address map for 2 chip selects
◆
Automatic wait state generation.
PCI Bus Bridge
In order to leverage the wide availability of low-cost peripherals for
the PC market as well as to simplify the design of add-in functions, the
RC32334 integrates a full 32-bit PCI bus bridge. Key attributes of this
bridge include:
◆
66 MHz operation
◆
PCI revision 2.2 compliant
◆
Programmable address mappings between CPU/Local memory
and PCI memory and I/O
◆
On-chip PCI arbiter
◆
Extensive buffering allows PCI to operate concurrently with local
memory transfers
◆
Selectable byte-ordering swapper
◆
5V tolerant I/O.
On-Chip DMA Controller
To minimize CPU exception handling and maximize the efficiency of
system bandwidth, the RC32334 integrates a very sophisticated 4-
channel DMA controller on chip.
The RC32334 DMA controller is capable of:
◆
Chaining and scatter/gather support through the use of a
flexible, linked list of DMA transaction descriptors
◆
Capable of memory<->memory, memory<->I/O, and
PCI<->memory DMA
◆
Unaligned transfer support
◆
Byte, halfword, word, quadword DMA support.
On-Chip Peripherals
The RC32334 also integrates peripherals that are common to a wide
variety of embedded systems.
◆
Dual channel 16550 compatible UARTs, with modem control
interface on one channel.
◆
SPI master mode interface for direct interface to EEPROM,
A/D, etc.
◆
Interrupt Controller to speed interrupt decode and management
◆
Four 32-bit on-chip Timer/Counters
◆
Programmable I/O module
Debug Support
To facilitate rapid time to market, the RC32334 provides extensive
support for system debug.
First and foremost, this product integrates an EJTAG in-circuit emula-
tion module, allowing a low-cost emulator to interoperate with programs
executing on the controller. By using an augmented JTAG interface, the
RC32334 is able to reuse the same low-cost emulators developed
around the RC32364 CPU.
Secondly, the RC32334 implements additional reporting signals
intended to simplify the task of system debugging when using a logic
analyzer. This product allows the logic analyzer to differentiate transac-
tions initiated by DMA from those initiated by the CPU and further allows
CPU transactions to be sorted into instruction fetches vs. data fetches.
Finally, the RC32334 implements a full boundary scan capability,
allowing board manufacturing diagnostics and debug.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32334-100BBI | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BB | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBG | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32334-100BBI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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