參數(shù)資料
型號(hào)： 79RC32334
廠商： Integrated Device Technology, Inc.
英文描述： IDT Interprise Integrated Communications Processor
中文描述： IDT的洽談會(huì)集成通信處理器
文件頁(yè)數(shù)： 15/30頁(yè)
文件大小： 467K
代理商： 79RC32334
15 of 30
August 31, 2004
IDT 79RC32334—Rev. Y
Power Ramp-up
There is no special requirement for how fast Vcc and VccP ramp up to 3.3V. However, all timing references are based on Vcc and VccP stabilized
at 3.3V -5%.
AC Timing Characteristics — RC32334
(Ta = 0
°
C to +70
°
C Commercial, Ta = -40
°
C to +85
°
C Industrial, V
cc
I/O = +3.3V
±
5%,V
cc
Core = +3.3V
±
5%)
Signal
Symbol
Reference
Edge
RC32334
1
100MHz
RC32334
1
133MHz
RC32334
1
150MHz
Unit
User
Manual
Timing
Diagram
Reference
Min
Max
Min
Max
Min
Max
Local System Interface
mem_data[31:0] (data phase)
Tsu2
cpu_masterclk rising
6
—
5
—
4.8
—
ns
mem_data[31:0] (data phase)
Thld2
cpu_masterclk rising
1.5
—
1.5
—
1.5
—
ns
cpu_dt_r_n
Tdo3
cpu_masterclk rising
—
15
—
12
—
10
ns
Chapter 9,
Figures 9.2
and 9.3
mem_data[31:0]
Tdo4
cpu_masterclk rising
—
12
—
10
—
9.3
ns
mem_data[31:0] output hold time
Tdoh1
cpu_masterclk rising
1
—
12
2
12
2
1
—
10
2
10
2
1
—
9.3
2
9.3
2
ns
mem_data[31:0] (tristate disable time)
Tdz
cpu_masterclk rising
—
—
—
ns
mem_data[31:0] (tristate to data time)
Tzd
cpu_masterclk rising
—
—
—
ns
mem_wait_n
Tsu6
cpu_masterclk rising
9
—
7
—
6
—
ns
mem_wait_n
Thld8
cpu_masterclk rising
1
—
1
—
1
—
ns
Chapter 10,
Figures 10.6
through 10.8
mem_addr[25:2]
Tdo5
cpu_masterclk rising
—
12
—
9
—
8
ns
mem_cs_n[5:0]
Tdo6
cpu_masterclk rising
—
12
—
9
—
8
ns
mem_oe_n, mem_245_oe_n
Tdo7
cpu_masterclk rising
—
12
—
9
—
8
ns
mem_we_n[3:0]
Tdo7a
cpu_masterclk rising
—
15
—
12
—
10
ns
mem_245_dt_r_n
Tdo8
cpu_masterclk rising
—
15
—
12
—
10
ns
mem_addr[25:2]
mem_cs_n[5:0]
mem_oe_n, mem_we_n[3:0], mem_245_dt_r_n,
mem_245_oe_n
Tdoh3
cpu_masterclk rising
1.5
—
1.5
—
1.5
—
ns
PCI
pci_ad[31:0], pci_cbe_n[3:0], pci_par, pci_frame_n,
pci_trdy_n, pci_irdy_n, pci_stop_n, pci_perr_n,
pci_serr_n, pci_devsel_n, pci_lock_n
3
Tsu
pci_clk rising
3
—
3
—
3
—
ns
pci_idsel, pci_req_n[2], pci_req_n[1], pci_req_n[0],
pci_gnt_n[0], pci_inta_n
Tsu
pci_clk rising
5
—
5
—
5
—
ns
pci_gnt_n[0]
Tsu
pci_clk rising
5
—
5
—
5
—
ns
pci_ad[31:0], pci_cbe_n[3:0], pci_par, pci_frame_n,
pci_trdy_n, pci_irdy_n, pci_stop_n, pci_perr_n,
pci_serr_n, pci_rst_n, pci_devsel_n, pci_lock_n
3
Thld
pci_clk rising
0
—
0
—
0
—
ns
Per PCI 2.2
pci_idsel, pci_req_n[2], pci_req_n[1], pci_req_n[0],
pci_gnt_n[0], pci_inta_n
Thld
pci_clk rising
0
—
0
—
0
—
ns
pci_eeprom_mdi
Tsu
pci_clk rising,
pci_eeprom_sk falling
15
—
12
—
10
—
ns
Table 6 AC Timing Characteristics - RC32334 (Part 1 of 4)
相關(guān)PDF資料
PDF描述
79RC32334-100BB IDT Interprise Integrated Communications Processor
79RC32334-100BBG IDT Interprise Integrated Communications Processor
79RC32334-100BBGI IDT Interprise Integrated Communications Processor
79RC32334-100BBI IDT Interprise Integrated Communications Processor
79RC32334-133BB IDT Interprise Integrated Communications Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
79RC32334-100BB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-100BBG 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-100BBGI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-100BBI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-133BB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
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