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參數(shù)資料
| 型號： | 79RC32351-133DH |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT Interprise Integrated Communications Processor |
| 中文描述： | IDT的洽談會集成通信處理器 |
| 文件頁數(shù)： | 11/42頁 |
| 文件大?。?/td> | 560K |
| 代理商： | 79RC32351-133DH |
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11 of 42
May 25, 2004
IDT 79RC32351
Boot Configuration Vector
The boot configuration vector is read into the RC32351 during cold reset. The vector defines parameters in the RC32351 that are essential to oper-
ation when cold reset is complete.
The encoding of boot configuration vector is described in Table 2, and the vector input is illustrated in Figure 6.
U0DTRN
O
Low Drive
UART channel 0 data terminal ready.
Primary function: General Purpose I/O, GPIOP[4]. At reset, this pin defaults to primary function GPIOP[4] if CPU/DMA Sta-
tus Mode enable is not selected during reset using the boot configuration.
2nd Alternate function: CPU or DMA transaction indicator, CPUP.
U0DSRN
I
STI
UART channel 0 data set ready.
Primary function: General Purpose I/O, GPIOP[5]. At reset, this pin defaults to primary function GPIOP[5].
U0RTSN
O
Low Drive
UART channel 0 request to send.
Primary function: General Purpose I/O, GPIOP[6]. At reset, this pin defaults to primary function GPIOP[6].
U0CTSN
I
STI
UART channel 0 clear to send.
Primary function: General Purpose I/O, GPIOP[7]. At reset, this pin defaults to primary function GPIOP[7].
U0SOUTP
O
Low Drive
UART channel 1 serial transmit.
Primary function: General Purpose I/O, GPIOP[8]. At reset, this pin defaults to primary function GPIOP[8] if DMA Debug
enable is not selected during reset using the boot configuration.
2nd Alternate function: DMA channel, DMAP[3].
U1SINP
I
STI
UART channel 1 serial receive.
Primary function: General Purpose I/O, GPIOP[9]. At reset, this pin defaults to primary function GPIOP[9] if DMA Debug
enable is not selected during reset using the boot configuration.
2nd Alternate function: DMA channel, DMAP[2].
U1DTRN
O
Low Drive
UART channel 1 data terminal ready.
Primary function: General Purpose I/O, GPIOP[10]. At reset, this pin defaults to primary function GPIOP[10] if ICE Interface
enable is not selected during reset using the boot configuration.
Alternate function: PC trace status bit 0, EJTAG_PCST[0].
U1DSRN
I
STI
UART channel 1 data set ready.
Primary function: General Purpose I/O, GPIOP[11]. At reset, this pin defaults to primary function GPIOP[11] if ICE Interface
enable is not selected during reset using the boot configuration.
2nd Alternate function: PC trace status bit 1, EJTAG_PCST[1].
U1RTSN
O
Low Drive
UART channel 1 request to send.
Primary function: General Purpose I/O, GPIOP[12]. At reset, this pin defaults to primary function GPIOP[12] if ICE Interface
enable is not selected during reset using the boot configuration.
2nd Alternate function: PC trace status bit 2, EJTAG_PCST[2].
U1CTSN
I
STI
UART channel 1 clear to send.
Primary function: General Purpose I/O, GPIOP[13]. At reset, this pin defaults to primary function GPIOP[13] if ICE Interface
enable is not selected during reset using the boot configuration.
2nd Alternate function: PC trace clock, EJTAG_DCLK.
1.
Schmitt Trigger Input.
Name
Type I/O Type
Description
Table 1 Pin Descriptions (Part 7 of 7)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32355-133DH | Communications Processor |
| 79RC32355-133DHI | Communications Processor |
| 79RC32T355-133DH | IDT Interprise Integrated Communications Processor |
| 79RC32T355-133DHI | IDT Interprise Integrated Communications Processor |
| 79RC32T355-150DH | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32355 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355133DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-133DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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