參數(shù)資料
型號: 79RC32T355180DH
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: Communications Processor
中文描述: 32-BIT, 180 MHz, RISC PROCESSOR, PQFP208
封裝: 28 X 28 MM, 3.40 MM HEIGHT, MO-143FA1, PLASTIC, QFP-208
文件頁數(shù): 25/47頁
文件大小: 987K
代理商: 79RC32T355180DH
25 of 47
May 25, 2004
IDT 79RC32355
Signal
Symbol
Reference
Edge
133MHz
150MHz
180MHz
Unit
Conditions
Timing
Diagram
Reference
Min
Max
Min
Max
Min
Max
Ethernet
1,2
MIIRXCLKP, MIITXCLKP
Tperiod1
none
399.96 400.04 399.96 400.04 399.96 400.04
ns
10 Mbps
Figure 13
Thigh1,Tlow1
140
260
140
260
140
260
ns
Trise1,Tfall1
3
3
3
ns
MIIRXCLKP, MIITXCLKP
Tperiod1
none
39.996 40.004 39.996 40.004 39.996 40.004
ns
100 Mbps
Thigh1,Tlow1
14
26
14
26
14
26
ns
Trise1,Tfall1
2
2
2
ns
MIIRXDP[3:0],
MIIRXDVP, MIIRXERP
Tsu2
MIIRXCLKP
rising
5
5
5
ns
Thld2
3
3
3
ns
MIITXDP[3:0], MIITXENP,
MIITXERP
Tdo3
MIITXCLKP
rising
7
13
7
13
7
13
ns
MIIMDCP
Tperiod4
none
30
27
27
ns
Thigh4,Tlow4
14
13
13
ns
Trise4
11
11
11
ns
Tfall4
8
8
8
ns
MIIMDIOP
Tsu5
MIIMDCP
rising
6
6
6
ns
Thld5
0.5
0.5
0.5
ns
Tdo5
3
7
3
7
3
7
ns
1
Ethernet clock (MIIRXCLKP and MIITXCLKP) frequency must be equal to or less than 1/2 CLKP frequency.
2
MIICOLP and MIICRSP are asynchronous signals.
Table 7 Ethernet AC Timing Characteristics
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