參數(shù)資料
型號(hào): 7LVC544APWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Octal D-type registered transceiver, inverting 3-State
中文描述: LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
文件頁數(shù): 3/10頁
文件大?。?/td> 90K
代理商: 7LVC544APWDH
Philips Semiconductors
Octal D-type registered transceiver, inverting
(3-State)
Product specification
74LVC544A
1998 Jul 29
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
LEBA
‘B’ to ‘A’ latch enable input (active
LOW)
2
OEBA
‘B’ to ‘A’ output enable input (active
LOW)
3, 4, 5, 6,
7, 8, 9, 10
A0–A7
‘A’ data inputs/outputs
11
EBA
‘B’ to ‘A’ enable input (active LOW)
12
GND
Ground (0V)
22, 21, 20, 19,
18, 17, 16, 15
B0–B7
‘B’ data inputs/outputs
13
OEAB
‘A’ to ‘B’ output enable input (active
LOW)
14
LEAB
‘A’ to ‘B’ latch enable input (active
LOW)
23
EAB
‘A’ to ‘B’ enable input (active LOW)
24
VCC
Positive supply voltage
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
LEBA
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
EAB
V
CC
EBA
B0
B1
B2
B3
B4
B6
B5
B7
LEAB
OEAB
GND
SV00733
FUNCTION TABLE
INPUTS
OUTPUTS
STATUS
OEXX
EXX
LEXX
DATA
H
X
X
X
Z
Disabled
X
H
X
X
Z
Disabled
L
L
L
L
h
l
Z
Z
Disabled + Latch
L
L
L
L
h
l
L
H
Latch + Display
L
L
L
L
L
L
H
L
L
H
Transparent
L
L
H
X
NC
Hold
XX
H
L
h
l
X
NC
Z
= AB for A-to-B direction, BA for B-to-A direction
= HIGH voltage level
= LOW voltage level
= HIGH state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB, EBA
= LOW state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB, EBA
= Don’t care
= LOW–to–HIGH level transition
= No change
= High impedance OFF-state
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