參數(shù)資料
型號(hào): 83056AGI-01
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: 83056 SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO20
封裝: 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
文件頁數(shù): 12/14頁
文件大?。?/td> 678K
代理商: 83056AGI-01
ICS83056I-01
6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER
IDT / ICS 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER
7
ICS83056AGI-01 REV. A JANUARY 29, 2009
Table 5E. AC Characteristics, VDD = 2.5V ± 5%, VDDO = 1.8V ± 0.2V, TA = -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Driving only one input clock.
NOTE 3: This parameter is defined according with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fMAX
Output Frequency
250
MHz
tpLH
Propagation Delay, Low-to-High;
NOTE 1
2.2
3.2
4.2
ns
tpHL
Propagation Delay, High-to-Low;
NOTE 1
2.2
3.2
4.0
ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section;
NOTE 2
155.52MHz, Integration Range:
12kHz – 20MHz
0.19
ps
tsk(i)
Input Skew; NOTE 3
110
ps
tsk(o)
Output Skew: NOTE 4
125
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 5
800
ps
tR / tF
Output Rise/Fall Time
20% to 80%
450
850
ps
odc
Output Duty Cycle
fOUT ≤ 200MHz
40
60
%
MUXISOLATION MUX Isolation
100MHz
45
dB
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