參數(shù)資料
型號： 83336-21
廠商： PEREGRINE SEMICONDUCTOR CORP
元件分類： PLL合成/DDS/VCOs
英文描述： 3.0 GHz Integer-N PLL for Low Phase Noise Applications
中文描述： PHASE LOCKED LOOP, CQCC44
封裝： CERAMIC, QFJ-44
文件頁數(shù)： 9/13頁
文件大?。?/td> 318K
代理商： 83336-21
Product Specification
PE83336
Page 5 of 13
Document No. 70-0137-02
│ www.psemi.com
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Table 2. Absolute Maximum Ratings
Note 1:
Periodically sampled, not 100% tested. Tested per MIL-
STD-883, M3015 C2
Table 4. ESD Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Table 3. Operating Ratings
Table 5. DC Characteristics: VDD = 3.0 V, -55° C ≤ TA ≤ 125° C, unless otherwise specified
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
-0.3
4.0
V
VI
Voltage on any input
-0.3
VDD
+ 0.3
V
II
DC into any input
-10
+10
mA
IO
DC into any output
-10
+10
mA
Tstg
Storage temperature
range
-65
150
°C
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
2.85
3.15
V
TA
Operating ambient
temperature range
-55
125
°C
Symbol
Parameter/Conditions
Level
Units
VESD
ESD voltage (Human Body
Model)
1000
V
Symbol
Parameter
Conditions
Min
Typ
Max
Units
IDD
Operational supply current;
Prescaler disabled
Prescaler enabled
VDD = 2.85 to 3.15 V
10
20
28
mA
Digital Inputs: All except fr, R0, Fin, Fin
VIH
High level input voltage
VDD = 2.85 to 3.15 V
0.7 x VDD
V
VIL
Low level input voltage
VDD = 2.85 to 3.15 V
0.3 x VDD
V
IIH
High level input current
VIH = VDD = 3.15 V
+70
A
IIL
Low level input current
VIL = 0, VDD = 3.15 V
-1
A
Reference Divider input: fr
IIHR
High level input current
VIH = VDD = 3.15 V
+100
A
IILR
Low level input current
VIL = 0, VDD = 3.15 V
-100
A
R0 Input (Pull-up Resistor): R0
IIHRO
High level input current
VIH = VDD = 3.15 V
+70
A
IILRO
Low level input current
VIL = 0, VDD = 3.15 V
-5
A
Counter and phase detector outputs: fc, fp, PD_D, PD_U
VOLD
Output voltage LOW
Iout = 6mA
0.4
V
VOHD
Output voltage HIGH
Iout = -3mA
VDD - 0.4
V
Lock detect outputs: Cext, LD
VOLC
Output voltage LOW, Cext
Iout = 100A
0.4
V
VOHC
Output voltage HIGH, Cext
Iout = -100A
VDD - 0.4
V
VOLLD
Output voltage LOW, LD
Iout = 6mA
0.4
V
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