參數(shù)資料
型號： 8817
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： NTSC/PAL Digital Video Encoder
中文描述： NTSC / PAL數(shù)字視頻編碼器
文件頁數(shù)： 19/43頁
文件大小： 818K
代理商： 8817
ASAHI KASEI
[AK8817]
MS0413-E-00
19
2005 / Aug
(14-2) Video Interface mode
The AK8817 synchronizes with input signal by the following, 2 interface modes.
(a) Slave-mode interface where synchronization is made with externally-fed synchronization signals HDI / VDI
( HDI / VDI interface )
(b) ITU-R BT.656 Interface mode ( 656 interface )
interface mode setting is controlled by [REC656]-bit of Control 2 Register.
REC656-bit
Operation
0
HDI / VDI Slave mode
1
ITU-R BT.656 Interface mode
(a-1) Timing signal ( HDI / VDI ) VS Data input relation
Horizontal Synchronization ( in-line Pixel Sync ) is made with HDI synchronization timing signal.
Vertical Synchronization ( in-line Frame Line Sync ) is made with VDI synchronization timing signal.
Recognition of Video Field ( Odd Field or Even Field ) is made by VDI input signal which is referenced with HDI.
In normal operation, the AK8817 checks changes of HDI and VDI at the clock edge ( CLK synchronization )
which becomes a data capture reference position.
At a pixel position where HDI is judged to become “ Low “, it is recognized as 0
H
(zero th position ).
Cb0 data position depends on input data rate ( ITU-R BT.601 or Square Pixel data ).
Cb0 Data
At ITU-R BT.601 Data input
NTSC Encoder
244
data
PAL Encoder
264
th
data
Video Field is recognized by the VDI relation with HDI.
Field recognition is made as follows :
The AK8817 distinguishes at every Field if it is Odd Field ( 1
st
Field ) or not. Even Field Sync signal is not usually input.
1 ) Recognition timing of Odd Field is decided by those timing signal relations which are fed on HDI and VDI pins.
When the VDI falling pulse is input on VDI input pin during the time from 3 clocks prior to the falling edge of
HDI timing pulse which is fed on HDI input till 3 clocks prior to the rising edge of HDI timing pulse, the Line is
recognized to be Line 4.
Line4/Line1(NTSC/PAL)
Line5/Line2(NTSC/PAL)
At Square Pixel data input
236
data
310
th
data
HDI
VDI
3CLK
3CLK
Line6/Line3(NTSC/PAL)
2 ) Whenever Horizontal / Vertical SYNC signal inputs are not fed as expected in the Video Specifications, in term of
timing and # of pulses ( kept at “ High “ level ), the AK8817 continues to self-run the operation which is based on the Sync
signals, fed just before.
But it is recommended to feed Sync signals as specified every time in order to prevent erroneous operation.
3 ) VD pulse input at other than Odd Field synchronization is ignored ( Synchronization is made with Odd Field only ).
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