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參數(shù)資料
| 型號(hào)： | 8P001SRV0303C15 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 MULTI DEVICE SRAM CARD, 150 ns, XMA68 |
| 封裝： | CARD-68 |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大小： | 340K |
| 代理商： | 8P001SRV0303C15 |
8
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
SRV01-SRV04
February 2007
Rev. 2
AC CHARACTERISTICS
Write Timing Parameters
5.0V
3.3V
SYM (PCMCIA)
Parameter
Min
Max
Min
Max
Unit
tCW
Write Cycle Time
150
250
ns
tw(WE)
Write Pulse Width
80
150
ns
tsu(A)
Address Setup Time
20
30
ns
tsu(A-WEH)
Address Setup Time for WE#
100
180
ns
tsu(CE-WEH)
Card Enable Setup Time for WE#
100
180
ns
tsu(D-WEH)
Data Setup Time for WE#
50
80
ns
th(D)
Data Hold Time
20
30
ns
trec(WE)
Write Recover Time
20
30
ns
tdis(WE)
Output Disable Time from WE#
75
100
ns
tdis(OE)
Output Disable Time from OE#
75
100
ns
ten(WE)
Output Enable Time from WE#
5
ns
tdis(OE)
Output Enable Time from OE#
5
ns
tsu(OE-WE)
Output Enable Setup from WE#
10
ns
th(OE-WE)
Output Enable Hold from WE#
10
ns
tsu(CE)
Card Enable Setup Time from OE#
0
ns
th(CE)
Card Enable Hold Time
20
ns
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specications.
Write Timing Diagram
Note:
1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be
applied to the data pins (D15 -D0) by the host system.
th(OE-WE)
NOTE 1
CE1#, CE2#
NOTE 1
tsu(CE-WEH)
tc(W)
A [25::0], REG#
tw(WE)
tdis(WE)
th(D)
D[15::0](Din)
DATA INPUT
tsu(A)
tsu(A-WEH)
OE#
tsu(CE)
tsu(D-WEH)
trec(WE)
th(CE)
tsu(OE-WE)
tdis(OE)
D[15::0](Dout)
ten(OE)
ten(WE)
NOTE 2
WE#
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