參數(shù)資料
型號(hào)： 908E621
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述： 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡
文件頁(yè)數(shù)： 28/62頁(yè)
文件大?。?/td> 540K
代理商： 908E621
Analog Integrated Circuit Device Data
Freescale Semiconductor
28
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
INTERRUPT MASK REGISTER (IMR)
L0IE - L0 Input Interrupt Enable Bit
This read/write bit enables CPU interrupts by the L0 flag,
L0IF. Reset clears the L0IE bit.
1 = interrupt requests from L0IF flag enabled
0 = interrupt requests from L0IF flag disabled
H0IE - H0 Input Interrupt Enable Bit
This read/write bit enables CPU interrupts by the Hallport
flag, H0IF. Reset clears the H0IE bit.
1 = interrupt requests from H0IF flag enabled
0 = interrupt requests from H0IF flag disabled
LINIE - LIN line Interrupt Enable Bit
This read/write bit enables CPU interrupts by the LIN flag,
LINIF. Reset clears the LINIE bit.
1 = interrupt requests from LINIF flag enabled
0 = interrupt requests from LINIF flag disabled
HTRD - High Temperature Reset Disable Bit
This read/write bit disables the high temperature reset
function. Reset clears the HTRD bit.
1 = high temperature reset is disabled
0 = high temperature reset is enabled
Note: Disabling of the high temperature reset can lead
to a destruction of the part in cases of high temperature.
This bit was foreseen for test purposes only!
HTIE - High Temperature Interrupt Enable Bit
This read/write bit enables CPU interrupts by the high
temperature flag, HTIF. Reset clears the HTIE bit.
1 = interrupt requests from HTIF flag enabled
0 = interrupt requests from HTIF flag disabled
LVIE - Low Voltage Interrupt Enable Bit
This read/write bit enables CPU interrupts by the low
voltage flag, LVIF.Reset clears the LVIE bit.
1 = interrupt requests from LVIF flag enabled
0 = interrupt requests from LVIF flag disabled
HVIE - High Voltage Interrupt Enable Bit
This read/write bit enables CPU interrupts by the high
voltage flag, HVIF.Reset clears the HVIE bit.
1 = interrupt requests from HVIF flag enabled
0 = interrupt requests from HVIF flag disabled
PSFIE - Power Stage Fail Interrupt Enable Bit
This read/write bit enables CPU interrupts by power stage
fail flag, PSFIF. Reset clears the PSFIE bit.
1 = interrupt requests from PSFIF flag enabled
0 = interrupt requests from PSFIF flag disabled
Register Name and Address: IMR - $09
Bit7
6
5
4
3
2
1
Bit0
Read
L0IE
H0IE
LINIE
HTRD
HTIE
LVIE
HVIE
PSFIE
Write
Reset
0
0
0
0
0
0
0
0
相關(guān)PDF資料
PDF描述
908E621_07 Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
908E624 TRIPLE HIGH-SIDE SWITCH WITH EMBEDDED MCU AND LIN
908E625 Integrated Quad Half H-Bridge with Power Supply, Embedded MCU, and LIN Serial Communication
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
908E621_07 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
908E621_08 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror
908E621_12 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half bridge and Triple High Side Embedded MCU and LIN for High End Mirror
908E622_12 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge, Triple High Side amd EC Glass Driver with Embedded MCU and LIN for High End Mirror
908E624 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Triple High-Side Switch with Embedded MCU and LIN Serial Communication for Relay Drivers
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