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參數(shù)資料
| 型號： | 91719BGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9179 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-16 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 97K |
| 代理商： | 91719BGLFT |
Integrated
Circuit
Systems, Inc.
ICS91719
0506C—07/28/03
Block Diagram
Pin Configuration
16-pin TSSOP
Features:
ICS91719 is a Spread Spectrum Clock targeted for
Mobile PC and LCD panel applications. Generates an
EMI optimized clock signal (EMI peak reduction of 7-
14 dB on 3rd-19th harmonics) through use of Spread
Spectrum techniques.
ICS91719 focuses on the lower input frequency
range of 14.318 to 80.00 MHz with a spread
modulation of 20kHz to 40kHz.
Specifications:
Supply Voltages: VDD = 3.3V ±0.3V
Frequency range: 14.318 MHz
≤ Fin ≥ 80 MHz
Cyc to Cyc jitter: <150ps
Output duty cycle 40/60% (worst case)
Guarantees +85°C operational condition.
16-pin TSSOP package 4.4mm body (173mils), 0.65
mm pitch
14.318 MHz crystal input or reference clock input
27MHz, 48MHz and 66MHz reference clock input
Low EMI, Spread Modulating, Clock Generator
Notes:
** Internal pull-down
^ Internal pull-up
GND
116 VDDREF
X1_CLKIN
215 VDDREF_SEL_2.5V/3.3V# ^
X2
314 REF_OUT/VDDREF_SEL_1.8V
GNDA
413 **REF_Stop
VDDA
512 ^P D#
VDD
611 SCLK
GND
710 SDA TA
* * CLKOUT/FS_IN0
89 ^SPREAD_ENABLE/FS_IN1
CLK
CL
REFOUT
KOUT
OUT
PD#
SPREAD#
CLKIN
PLL1
Spread
Spectr
Spectrum
um
SD
SDAT
REF_STOP
A
SCLK
FS_IN0:1
Control
Logic
Config.
Reg.
REF Voltage Select Functionality
Input Select Functionality
Pin14
Pin15
REF Voltage
0
N/A
0
1
1.8V
1
0
2.5V
1
3.3V
FS_IN1
FS_IN0
MHZ
Default Spread %
0
14.318 in 27.00 out
-0.8% downspread
0
1
14.318 in/out
-0.8% downspread
1
0
27.00 in/out
-0.8% downspread
1
48.00 in/out
66.66 in/out
-0.8% downspread
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