IDT CONFIDENTIAL
26
V 0.93 06/11
2009 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD92
92HD92
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
analog ports. Although the internal implementation is different between the analog ports and the dig-
ital microphones, the functionality is the same. In most cases, the default values for the DMIC clock
rate and data sample phase will be appropriate and an audio driver will be able to configure and use
the digital microphones exactly like an analog microphone.
To conserve power, the analog portion of the ADC will be turned off if the D-mic input is selected.
When switching from the digital microphone to an analog input to the ADC, the analog portion of the
ADC will be brought back to a full power state and allowed to stabilize before switching from the dig-
ital microphone to the analog input. This should take less than 10mS.
DMIC pin widgets support port presence detect directly using SENSE-B input.
The codec supports the following digital microphone configurations:
Digital
Mics
Data Sample
ADC
Conn.
Notes
0
N/A
No Digital Microphones
1
Single Edge
0, or 1
Available on either DMIC_0 or DMIC_1
When using a microphone that supports multiplexed operation (2-mics can share a
common data line), configure the microphone for “Left” and select mono operation using
the vendor specific verb.
“Left” D-mic data is used for ADC left and right channels.
2
Double Edge on
either DMIC_0 or 1
0, or 1
Available on either DMIC_0 or DMIC_1, External logic required to support sampling on a
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge (multiplexed output) capability.
3
Double Edge on
one DMIC pin and
Single Edge on the
second DMIC pin.
0, or 1
Requires both DMIC_0 and DMIC_1, External logic required to support sampling on a
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge (multiplexed output) capability. Two ADC units are required to support this
configuration
4
Double Edge
0, or 1
Connected to DMIC_0 and DMIC_1, External logic required to support sampling on a
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. Two ADC units are required to support this configuration
Table 16. Valid Digital Mic Configurations
Power State
DMIC Widget
Enabled?
DMIC_CLK
Output
DMIC_0,1
Notes
D0
Yes
Clock Capable
Input Capable
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
D1-D3
Yes
Clock Disabled
Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down
D0-D3
No
Clock Disabled
Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down
D4
-
Clock Disabled
Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down
D5
-
Clock Disabled
Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down
Table 17. DMIC_CLK and DMIC_0,1 Operation During Power States