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參數(shù)資料
| 型號(hào)： | 933407010112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 計(jì)數(shù)器 |
| 英文描述： | 4000/14000/40000 SERIES, ASYN POSITIVE EDGE TRIGGERED 17-BIT UP DECADE COUNTER, PDIP18 |
| 封裝： | PLASTIC, SOT-102-1, DIP-18 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 63K |
| 代理商： | 933407010112 |
January 1995
6
Philips Semiconductors
Product specication
Quadruple static decade counters
HEF4737B
HEF4737V
The values given at VDD = 15 V in the following d.c. and a.c. characteristics, are not applicable to the HEF4737V,
because of its reduced supply voltage range.
DC CHARACTERISTICS
VSS =0V
AC CHARACTERISTICS
VSS =0V; Tamb =25 °C; CL = 15 pF; input transition times ≤ 20 ns
VDD
V
VOH
V
VOL
V
SYMBOL
Tamb (°C)
40
+ 25
+ 85
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Input leakage
current at
10
± I
IN
0,3
1
A
VI = 0 or VDD
15
0,3
1
A
Output (sink)
4,75
0,4
1,6
1,6
1,4
mA
current LOW
10
0,5
IOL
2,5
2,3
1,7
mA
15
1,5
7,0
6,0
4,0
mA
Output (source)
5
4,6
0,96
0,80
0,65
mA
current HIGH
10
9,5
I
OH
2,4
2,0
1,6
mA
15
13,5
7,0
6,0
4,5
mA
Output (source)
current HIGH
5
2,5
I
OH
3,0
2,5
2,0
mA
3-state output
leakage current
10
± I
OZ
1,6
1,6
12
A
VO = 0 or VDD
15
1,6
1,6
12
A
VDD
V
SYMBOL
MIN.
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP
→ On
5
320
640
ns
308 ns
+ (0,24 ns/pF) CL
(D1 selected)
10
tPHL
120
240
ns
125 ns
+ (0,10 ns/pF) CL
HIGH to LOW
15
90
180
ns
86 ns
+ (0,07 ns/pF) CL
5
320
640
ns
296 ns
+ (0,48 ns/pF) CL
LOW to HIGH
10
tPLH
120
240
ns
110 ns
+ (0,20 ns/pF) CL
15
90
180
ns
82 ns
+ (0,15 ns/pF) CL
CP
→ On
5
620
1240
ns
608 ns
+ (0,24 ns/pF) CL
(D5 selected)
10
tPHL
330
660
ns
325 ns
+ (0,10 ns/pF) CL
HIGH to LOW
15
250
500
ns
246 ns
+ (0,07 ns/pF) CL
5
620
1240
ns
596 ns
+ (0,48 ns/pF) CL
LOW to HIGH
10
tPLH
330
660
ns
320 ns
+ (0,20 ns/pF) CL
15
250
500
ns
242 ns
+ (0,15 ns/pF) CL
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